Digital Senior Engineer

We are actively seeking a Senior design Engineer to join our dynamic and growing digital design team.

The Role:

Responsibilities include but not limited to:

• to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP development and IP integration in SOC.

• to collaborate with a multidisciplinary project team consisting of architecture microarchitecture IP providers SoC design for silicon products with focus on product execution.

• to work in tight collaboration with emulation verification and validation development teams to ensure bug free design

• to work across IP and SoC development teams to ensure delivery of complex silicon design projects ensuring quality and performance.

• to ensure that the final design meets the key factors such as power performance area and cost are meeting requirements.

• to work continuously to improve silicon development processes and architecture definition.

• to work with post-silicon validation manufacturing platform and software stakeholders throughout the product development cycle to meet end user needs through definition design validation and support phases.

• to ensure that the IP needs of an SoC integration team are met by working with internal/external IP providers; IP arrives on time meets quality standards and manages the development of the SoC itself as required.

• to mentor digital designers of the team and act as reference point for specific knowledge

Qualifications:

Minimum Qualifications:

Bachelors/Masters degree in Electronics/Electrical Engineering Computer Engineering Computer Science or in a related field

7 years of experience in Silicon development including multiple project development life cycles and Product/Project management

Good knowledge u-processor architecture bus architecture SOC design Test architecture/implementation

Deep knowledge of Digital design from RTL to GDSII.

o RTL writing Synthesis static timing analysis formal verification scan insertion and ATPG

Very Good knowledge of HW description language: Verilog SystemVerilog VHDL

o Good style for RTL coding and linting checks

Good knowledge of clock/reset synchronization.

Good knowledge of power management and UPF description

Good knowledge of scripting language: TCL.

Preferred Qualifications:

Knowledge of Network on chip architecture

RiscV ISA/architecture and SOC based on this processor.

Knowledge of high level (architecture) digital design language

Knowledge of architecture analysis tools used metric analysis.

Good knowledge of scripting languages: Perl Python.

Requirements listed would be obtained through a combination of industry relevant job experience internship experiences and or schoolwork/classes/research.

Soft skills

We are looking for team players that focus on the outcome of the team above the individual needs with respect and honest challenge.

Within- and cross-team collaboration at the technical level.

The ideal candidate should count with a can do attitude willing to solve any obstacle by himself. Self-starter and self-motivated.

What do we offer

• Join an innovative team and experience company growth.
• We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.
• Enjoy a hybrid work environment.
• We also offer flexible schedule.
• We offer a remuneration that values your experience.
• The role can be based in Barcelona (Spain) or Rome (Italy).

We are looking for outstanding people willing to join our mission to change this industry and help to build a better world.

If you feel identified with Openchip please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to keep a balance between your personal and professional life.

At Openchip & Software Technologies S.L. we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued respected and empowered to reach their full potential regardless of race gender ethnicity sexual orientation or gender identity.