Chelsea Search Group

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Principal High-Speed Analog Layout EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADCs DACs PLLs) from floor planning through

Senior Design Verification EngineerRemote / work from any US locationUS Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock OptionsResponsibilities: Contribute to the development of novel methodologies and verification techniques Create and maintain testbench

Senior Design Verification EngineerRemote / work from any US locationUS Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock OptionsResponsibilities: Contribute to the development of novel methodologies and verification techniques Create and maintain testbench

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior Design Verification EngineerRemote / work from any US locationUS Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock OptionsResponsibilities: Contribute to the development of novel methodologies and verification techniques Create and maintain testbench

Senior Design Verification EngineerRemote / work from any US locationUS Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock OptionsResponsibilities: Contribute to the development of novel methodologies and verification techniques Create and maintain testbench

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

Senior RTL Design EngineerRemote / work from any US locationMUST be a US Citizen or US Permanent ResidentFull-time/employee Bonus Benefits 401k Stock Options etcResponsibilities: Assist with silicon bring-up Design implement and integrate complex SoC blocks Develop block-level test c

High-Speed CMOS DAC/ADC/PLL Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribut

High-Speed CMOS DAC/ADC/PLL Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribut

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

High-Speed CMOS DAC/ADC/PLL Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from c

High-Speed CMOS DAC/ADC/PLL Analog Design EngineerUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc) Design of custom passive components from c

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

Staff or Principal Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribution etc)

High-Speed CMOS DAC/ADC/PLL Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribut

High-Speed CMOS DAC/ADC/PLL Analog Design EngineerLocations: Irvine CA San Jose CA or possibly remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsDuties & Responsibilities: Clock generation and distribution (VCOs PLL clock distribut

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC

Senior High-Speed Analog Layout EngineerLocations: Irvine San Jose Austin or remoteUS Citizen or US Permanent Resident preferredFull-time Employee Bonus Benefits 401k Stock OptionsResponsibilities Lead and own the physical layout design of complex analog/mixed-signal macros (e.g. ADC