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Wafer AI Member of Technical Staff

DeCircle


Job Location:

San Francisco, CA - USA

Yearly Salary: USD 200000 - 300000
Posted: 14 October 2026 (9 days ago)
Application Deadline: 11 January 2027
Vacancies: 1 Vacancy

Job Summary

Job description

Wafer AI: maximize intelligence per watt; autonomous AI performance engineers optimizing inference on heterogeneous hardware. 7 people $4M raised SF.

Comp: $200K-$300K 0.5%-1% equity. Location: on-site 5 days FiDi SF. Visa: Visa transfers (H-1B transfer OPT); must already be in US; no new H1B.

Responsibilities
  • Ship day-zero support for new open-source models tuned for latency/throughput

  • Optimize serving stack: batching KV cache speculative decoding quantization

  • Write/tune kernels in CUDA HIP Triton for NVIDIA AMD TPU Trainium D-Matrix

  • Design deploy operate heterogeneous multi-vendor clusters

  • Run production inference: reliability observability cost per token

Tech stack: CUDA HIP Triton Python TPU AWS Trainium

Source: requirements

  • 1-6 yrs SWE focused on systems close to hardware

  • GPU kernels (CUDA/HIP/Triton) inference serving optimization

  • First-principles resourceful high EQ; customer-facing comfort

  • On-site 5 days SF; must be in US

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Build onchain with a trusted full-stack platform including Arc, CPN, and USDC. Power payments, trading, and access to the agentic economy.

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