Senior Principal Verification Engineer

Design and architect mixed-signal verification environments including Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration for PMIC designs

Develop and implement comprehensive verification plans and strategies for automotive PMIC products ensuring compliance with automotive safety standards (ISO 26262 AEC-Q200)

Set up and optimize Gate-Level Simulation (GLS) flows correlating with RTL simulation results to identify and resolve discrepancies

Lead debugging activities for complex analog blocks including switched-mode regulators Linear Dropout (LDO) regulators and mixed-signal interfaces

Conduct in-depth RTL and Gate-Level simulations analyzing timing power and functional correctness across process voltage and temperature (PVT) corners

Collaborate closely with cross-functional teams: Design Application Engineering ATE (Automatic Test Equipment) and Silicon Validation to ensure seamless verification handoffs

Mentor and lead junior verification engineers defining best practices and establishing verification methodologies

Troubleshoot and debug complex design issues involving interactions between analog and digital domains using simulation and measurement techniques

Drive continuous improvement of verification tools methodologies and infrastructure evaluating emerging verification technologies and AI-based solutions

Create and maintain comprehensive verification documentation test plans and coverage metrics

Qualifications :

MS or PhD in Electrical Engineering Computer Engineering or related field

15 years of experience in mixed-signal or analog circuit verification

Deep understanding of all aspects of mixed-signal verification environment architecture and implementation

Hands-on experience with Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration

Proficiency in RTL and behavioral simulation tools (e.g. Spectre Xcelium)

Strong understanding of Gate-Level Simulation (GLS) flows and ability to set up and debug GLS simulations

Proven expertise debugging both analog blocks (switched-mode regulators LDO bandgap reference circuits) and digital RTL

Experience with automotive PMIC or power management IC design and verification

Proficiency in Verilog SystemVerilog and/or SPICE-based languages

Solid understanding of verification methodologies: UVM assertions coverage-driven verification

Experience interfacing with multiple verification domains: functional post-silicon ATE test correlation

Excellent problem-solving and debugging skills with strong analytical mindset

Leadership and mentoring experience

Additional Information :

Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier. With a global team of over 21000 engineers and problem solvers in more than 30 countries we offer the opportunity to work on worldleading technology for Automotive Industrial Infrastructure and IoT shaping a safer healthier greener and smarter future.

At Renesas TAGIE is our culture grounded in being Transparent Agile Global Innovative and Entrepreneurial. It shapes how we work grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us

Renesas Electronics is an equal opportunity and affirmative action employer committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex race religion national origin gender gender identity gender expression age sexual orientation military status veteran status or any other basis protected by law. For more information please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

Remote Work :

No

Employment Type :

Full-time