Physical Synthesis CAD Engineer

Do you want to directly impact the performance of every iPhone iPad and Mac Youll push the boundaries of physical synthesis for Apples cutting-edge processors solving problems that determine whether our next-generation CPUs GPUs and NPUs can deliver breakthrough performance while maintaining industry-leading power efficiency.

Youll own the synthesis challenges that matter most to Apple Silicon. You will apply your hands-on skills in developing improving and supporting the implementation flow from RTL through GDS signoff. You will be directly responsible to improve physical synthesis techniques through innovative scripts flows and the synthesis and flow expert youll partner closely with design teams to define what works best for their specific challenges. Youll develop the methodologies tools and optimized flows that enable design teams to achieve breakthrough PPA results. Youll push beyond conventional synthesis limits - developing innovative techniques and proving their effectiveness by running full validation flows from RTL through place-and-route and timing signoff to show actual PPA improvements. Your optimizations will directly translate to faster more efficient Apple work directly with EDA vendors to shape tool roadmaps build custom solutions for problems that push beyond industry standards and see your work ship in millions of devices.

Develop breakthrough physical synthesis techniques and validate them with full implementation flows (PNR STA power analysis)nnApply advanced RTL optimization techniques to achieve substantial improvements in performance power and area (PPA)nnPartner with design teams to define optimal methodologies and flows enabling them to achieve superior PPA resultsnnCreate custom tools and ML-based methodologies for todays most challenging high-performance low-power design problemsnnDrive synthesis innovation that enables Apples next-generation processor architecturesnnInfluence EDA vendor tool development by solving the hardest problemsnnDeploy solutions across multiple critical Apple Silicon projects

Experience with TCL Python or Perl scripting languagesnExperience with industry standard Synthesis tools such as Fusion Compiler or GenusnExperience working with CAD Tools u0026 flownMinimum requirement of BS 3 years of relevant industry experience

Experience in CAD flow or FE methodology developmentnExperience with Low Power implementation flows (UPF) is a plusnExperience with logical equivalence tools such as Conformal LEC and/or Formality is a plusnExperience in linting static timing analysis low power checks (UPF) or place and route tools is a plusnProficiency with TCL Python or Perl scripting languages strongly preferred