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PCIE Characterization Engineer


Job Location:

Palo Alto, CA - USA

Hourly Salary: USD 100 - 110
Posted: 24 October 2026 (7 hours ago)
Application Deadline: 21 January 2027
Vacancies: 1 Vacancy

Job Summary

Immediate need for a talented PCIE Characterization Engineer. This is a 06 Months Contract opportunity with long-term potential and is located in Palo Alto CA(Onsite). Please review the job description below and contact me ASAP if you are interested.

Job ID:26-30737

Pay Range: $100 - $110/hour. Employee benefits include but are not limited to health insurance (medical dental vision) 401(k) plan and paid sick leave (depending on work location).


Key Requirements and Technology Experience:
  • 5 years post-silicon electrical characterization HSIO validation or memory electrical validation of SoC PHYs
  • Hands-on ownership of PCIe or Ethernet and some experience with UFS or LPDDR5.
  • Lab fluency: high-speed oscilloscopes BERT VNA/TDR protocol and logic analyzers; you have personally taken eyes jitter BER and S-parameter data and used it to close a silicon issue
  • Working knowledge of signal integrity SerDes silicon PVT sensitivity and JEDEC / PCI-SIG / MIPI-UFS electrical specs
  • Ability to read schematics and layout debug at the probe point and separate PHY vs. package vs. board vs. firmware
  • Scripting for lab automation and data analysis (Python preferred)
  • Clear written and verbal communication; you can present a margin plot and a root-cause story to design and program teams.
Our client is a leading IT Industry and we are currently interviewing to fill this and other similar contract positions. If you are interested in this position please apply online for immediate consideration.

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Required Experience:

IC


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Drive business growth with Pyramid Consulting’s workforce and technology solutions. We deliver IT services and global talent strategies that scale across industries.

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