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Logic Library Development Lead

Apple


Job Location:

Santa Clara County, CA - USA

Monthly Salary: Not provided by the employer
Posted: 29 September 2026 (6 days ago)
Application Deadline: 27 December 2026
Vacancies: 1 Vacancy

Job Summary

Do you have passion to join a world-class Digital Design Engineering group and take imaginative and revolutionary ideas and determine how to turn them into reality! You will apply engineering fundamentals and start from scratch if needed bringing forward-thinking and groundbreaking ideas to the real world. Youll help design the tools that allow us to bring customers experiences theyve never-before envisioned. We have an extraordinary opportunity for Library Development Manager to lead libraries for Apple Products in todays cutting edge this highly visible role you will be at the heart of a processor design effort working with the custom digital circuits team with focus on delivering quality products to market quickly.

Imagine yourself at the center of our cutting-edge processor design in deep submicron technologies and on standard cell library designs. You will have the opportunity to integrate and come-up with new insights as well as work with a team of talent this role on our custom circuits team you will: n- Drive internal AI based library development requirementsn- Drive logic library requirements for Apple products with internal design teams and CAD/foundry/tool vendors.n- Enable new technology requirements in logic library development flows working with foundry and internal technology teams.n- Lead library characterization modeling genAI QA activities.n- Collaborate with cross functional organizations on product requirement

BS and a minimum of 10 years of relevant industry experience

MSEE preferred* nProven track record of leading highly competitive teams and delivering on in Library Characterization Timing/Power/CCS Noise/Variation Modeling Liberty Formats Spice simulation Static Timing and Power Analysis flows etc. nKnowledge of timing modeling of large custom macros and complex sequential to Design For Test scan concept and write DFT friendly RTLnUnderstands all aspects of implementation specification design timing power and flow analysis and ML knowledge to study data trend and perform QA on big dataset with automationnExperience in using Python/TCL/PerlnKnowledge of FE modeling/Verilog and/or VHDL and experience with various EDA tools for characterization synthesis place-route Verilog simulation spice simulation formal verification DRC/LVS RC extraction and/or library characterization. nProven understanding of device physics and with foundry ecosystem and benchmarking practice.

Required Experience:

Senior IC


About Company

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Ask Siri to name the most successful company in the world and it might respond: Apple. And it's not just out of familial pride. Apple consistently ranks highly in profit, revenue, market capitalization, and consumer cachet. In 2018, the company became the first reach a trillion dollar ... View more

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