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Hardware Design Engineer 4- #26-21020
Job Location:
Job Location:
Santa Clara County, CA - USA
Hourly Salary:
USD 80 - 85
Hourly Salary:
Posted:
22 October 2026 (Yesterday)
Posted:
Application Deadline:
19 January 2027
Application Deadline:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
Duration: 12 Months
Details:
As a member of the CT Server DDR team we are looking for an experienced signal integrity and power integrity engineer who can be responsible for DDR PHY channel and power delivery network (PDN) architecture system-level SI/PI and post-silicon validation.
The engineer needs to be hands-on in defining channel and PDN architectures modelling signal and power delivery at the system level and validating SI/PI on silicon. The engineer needs to work with design package board and firmware teams on the specification of SI/PI targets and their implementation and to help debug issues across the full system stack.
Key Responsibilities:
PREFERRED EXPERIENCE:
About US Tech Solutions:
US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions. To know more about US Tech Solutions please visit .
US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race colour religion sex sexual orientation gender identity national origin disability or status as a protected veteran.
AI Statement: By applying you acknowledge that AI-assisted tools may be used during hiring.
Details:
As a member of the CT Server DDR team we are looking for an experienced signal integrity and power integrity engineer who can be responsible for DDR PHY channel and power delivery network (PDN) architecture system-level SI/PI and post-silicon validation.
The engineer needs to be hands-on in defining channel and PDN architectures modelling signal and power delivery at the system level and validating SI/PI on silicon. The engineer needs to work with design package board and firmware teams on the specification of SI/PI targets and their implementation and to help debug issues across the full system stack.
Key Responsibilities:
- Run system-level channel and PDN simulations (insertion/return loss crosstalk eye diagrams impedance IR drop jitter transfer) and correlate with silicon results
- Able to process post-silicon SI/PI validation data and drive the next steps
- Debug SI/PI issues across silicon package and board working with firmware and design teams
- Support cross-functional teams with system channel PDN and decoupling implementation details
PREFERRED EXPERIENCE:
- Strong coding skills in Python and Matlab preferred
- Signal integrity (SI) and power integrity (PI) knowledge including S-parameter/Z-parameter analysis channel modeling and PDN modeling
- Knowledge of Ansys or Cadence simulation tools (e.g. HFSS SIwave Sigrity Clarity)
- System-level experience with firmware and hardware debug expertise preferred
- System modeling with silicon-to-simulation correlation
- Firmware development for ATE and platforms
- Bachelors or Masters degree in Computer Engineering/Electrical Engineering
About US Tech Solutions:
US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions. To know more about US Tech Solutions please visit .
US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race colour religion sex sexual orientation gender identity national origin disability or status as a protected veteran.
AI Statement: By applying you acknowledge that AI-assisted tools may be used during hiring.
Required Experience:
IC
About Company
USTECH SOLUTIONS is the largest independent diversity workforce partner operating a global footprint. For 20+ years, we have partnered with leading MSPs and some of the world’s largest enterprises to deliver a flexible workforce.
