FPGA Verification Engineer

The Anduril Imaging team developsstate-of-the-artimaging systems across both hardware and software deployed to tackle the most significant security challenges of America and its team is heavily involved inutilizingcomputer vision perception electro-optical infrared and sensor data to give our war fighters and allies an advantage.

The Imaging team is seeking a FPGA VerificationEngineer to help design a new this role you will work closely with an interdisciplinary technical team to define complete the design and analysis build prototypes leading to ground and flight testing and mature the prototypes into products.

• Verification environment architecture and design usingtools likeSystemVerilogorOVM/UVM
• Creation of written test plan testcases code coverage tracking and functional coverage tracking
• Testbench development for the verification of RTL blocks using VHDL orSystemVerilog
• Recommend new tools and practices for continuous improvement in the groups ASIC / FPGA verification flow
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project verification teams by breaking down work planning activities and reporting status

• ABachelors in Electrical Engineering Computer Engineering or a related technical field is typicallyrequired.
• 8 years of experience developing HDL firmware for FPGA devices
• Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
• experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
• Proven ability to design implement and execute verification testbenches for RTL blocks using VHDL and/orSystemVerilog.
• experience applying chip-level verification methodologies including constrained-random testing functional coverage analysis and assertion-based verification (SystemVerilog)
• Experience using revision control systems such as Git or Subversion to manage source code collaborate across engineering teams andmaintainconfiguration integrity.
• Eligible to obtain andmaintainan active U.S. Secret security clearance

• Experience with ASIC/FPGA lab validation and debug using standard lab equipment along with familiarity with DFT manufacturability and production test concepts.
• Proficiencywith Unix/Linux environmentsscriptingor software development (C C Python Perl or shell) and industry-standard ASIC/FPGA simulation and synthesis tools such asQuestaSimSynplify Quartus orVivado.

The salary range for this role is an estimate based on a wide range of compensation factors inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience education and/or training critical skills and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Andurils total compensation package. Additionally Anduril offers top-tier benefits for full-time employees including:

At Anduril we invest in our people. Our comprehensive competitive benefits package (available at little to no cost to employees) ensures youre supported in health recovery and whatever comes next.For more information Explore Our Benefits.

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