FPGA Engineering Manager (MTD, Tualatin, OR)

We are the global test and automation specialists powering next-generation technologies through sophisticated solutions. Behind every electronic device you use Teradynes test technology ensures your device works right the first time every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly efficiently and cost-effectively. TogetherTeradynecompanies deliver manufacturing automation across industries and applications around the world!

We attract develop and retain a high-performance workforce comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees and communities thrive.

Our Purpose
TERADYNE where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought within our workforce. Our employees are supportedto innovate and learn something new every day.

We cultivate a culture of inclusion for all employees that respects their individual strengths views and experiences. We believe that our differences enable us to be a better team one that makes better decisions drives innovation and delivers better business results.

Opportunity Overview

Teradynes Memory Test Division (MTD) seeks amotivated and technically driven FPGA Manager to support the development of our growing portfolio of cutting-edge memory test solutions.

MTD creates advanced solutions for complex testing applications driving innovation through creativity and diverse perspectives. Our test instrumentation supports the worlds most advanced memory technologies combiningstate-of-the-art digital and analog designscutting-edge ASIC/FPGA technologies liquid cooling and high-performance signal delivery.

We are looking for a hands-on FPGA Engineering Manager to oversee the development of cutting-edge memory test solutions. This role combines technical oversight project management and direct engineering contributions ensuring the successful delivery of high-quality reliable products that support the worlds most advanced memory technologies.

Your key responsibilities as FPGA Engineering Manager will be:

• Plan prioritize and manage multiple FPGA development projects ensuring on-time delivery within budget and scope.
• Represent the FPGA team on project core teams and at program reviews.
• Provide support for sustaining issues.
• Work closely with cross-functional teams including hardware software and firmware engineers to ensure seamless integration of FPGA designs into larger systems.
• Recruit onboard and retain top engineering talent to build a high-performing team.
• Set goals and conduct regular performance conversations for a team of 4 to 6 engineers.
• Contribute to FPGA team process improvement initiatives.
• Provide hands-on technical guidance to the FPGA engineering team including reviewing and contributing to FPGA architectures designs and specifications.
• Actively participate in FPGA design and development including RTL coding synthesis timing closure and lab validation.

All About You
We seek individuals who share our passion. Our commitment to customer success drives us to go the extra mile. If youre ready to join us in this mission take a closer look at the minimum criteria for the position.

• B.S. or M.S. in Electrical Engineering or closely related discipline
• 12 years of relevant experience in DigitalASIC or FPGAdesign
• Minimum of 5 years of experience as an FPGA/ASIC project lead driving multiple projects through concept development architectural exploration design implementation lab validation and production release.
• Extensive experience coding RTL(verilogpreferred).
• Extensive experienceusingdigital simulation tools (Cadence preferred).
• Extensive experienceusingstatic timing analysis tools.
• Experience designing with the following: PCIe DDR3/4/5 AXI ethernet SPI SERDES
• Experience with eitherAMDorAlteraFPGAs anddevelopment tools(Vivado/Quartus) preferably both.
• Experienceusingdigital design CDC.
• Experience with bug tracking tools
• Experience with source control systems and continuous integration.
• Familiarity with digital verification tools and methodologies (preferably UVM).
• Experience with projectschedulingtools
• Excellent presentation and communication skills.

Additional Desired Skills:

• Experience developing hardware for automated test equipment
• Experience as a first level manager of an engineering team.
• Experience with FPGA Transceiver based designs
• Experience with DRAM and Flash Memory interfaces
• Experience with Linux and Windows operating systems
• Familiarity with ATE instrumentation

Compensation: The base salary range for this role is$155500-$ range is a good faith estimate and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

Incentive Plan:This job is eligible for discretionary bonus(es) based on financial performance.

Benefits:Teradyne offers a variety of robust health and well-being benefit programs including medical dental vision Flexible Spending Accounts retirement savings plans life and disability insurance paid vacation & holidays tuitionassistanceprograms and more. Please clickhereto see details.

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