Experienced AMS Design Verification Engineer

At Apple we work daily to craft products that enrich peoples lives. Do you love working on challenges that no one has solved yet Do you like changing the game We have an opportunity for a forward-thinking and creative Design Verification Engineer. As a member of our Advanced Technology group you will have the rare and rewarding opportunity to craft upcoming products which will delight and encourage millions of Apples customers every single your lifes best work here at Apple! This role is for a Design Verification Engineer who will enable bug-free first silicon for the mixed-signal designs in our NEW London team. The responsibilities include all phases of pre-silicon verification including but not limited to: construction of verification environments coding of test scenarios and assertions and close collaboration with Analog and Digital Design engineers.

Definition and design of Self-checking verification environments for multi-layer systems using the SystemVerilog UVM library. The responsibility spans from concept discussions verification strategy definition and execution of the verification tasks to ensure bug-free tape-outs. The AMS DV engineer goes beyond standard verification techniques and include: n- performance-based analysis n- power related analysis and scenario design for early power estimation n- deliveries of tests for design and test engineering teamsn- gate-level verification (power and timing) n- lab bring-up support nnA significant part of the AMS DV team focuses on research and innovations to improve verification techniques and tools for mixed-signal systems in order to increase efficiency and quality. Looking forward and establishing cutting edge concepts and methods to support them are part of the AMS DV teams DNA.

Knowledge of System Verilog test-bench language and UVM (Universal Verification Methodology)nHands-on experience with constrained random verification environmentsnBasic design background in support of verification results analysisnKnowledge of Object Oriented Programming (OOP)nProficiency in English language is required

Masters degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalentnExperience in AI/ML is desirednHands-on experience with Assertion Based VerificationnFamiliarity with system design using C Python or VerilognFamiliarity with FPGA emulation platformsnApple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants including minorities women protected veterans and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about disclose or discuss their compensation or that of other applicants.