DigitalMixed Signal ModelingVerification Engineer

Does making the next great technology product excite you Imagine what you could do here. At Apple our new ideas have a way of becoming great products services and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team theres no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apples premier SOCs. This is a critical job within Apples Hardware Technology organization and wed love to have you join will own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks (regulators bandgaps data converters LNA/PA mixers PLLs) inside a large SoC including self-checking models assertions for analog/digital specs and AMS environment setup with analog designers

In this role you will own the modeling and verification of advanced analog/RF blocks residing within a large SoC.

Development of RNM RF/Analog models in models with self-checking required model accuracy level depending on verification appropriate assertions to ensure analog/digital specs are respected and provide digital verification passing with Analog designers setting up AMS simulation complex chip digital-on-top testbenches and seek root causes for failures.

BS and a minimum of 10 years relevant industry fundamentals in analog/RF circuit theory/ in RNM coding in SystemVerilog.

MSc and 7 years of relevant industry working with Cadence mixed signal verification to read analog schematics and extract related main modeling mixed signal/RF blocks including biasing networks power regulators bandgaps Opamps OTAs data converters LNA PA mixers couplers splitters combiners etcnExperience modeling high frequency PLLs is desired.