Design Verification Intern, BS Summer 2027
Austin, TX - USA
Job Summary
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
Marvells Design Verification teams span across multiple domains giving you the opportunity to work on technologies that power next-generation cloud AI storage and networking solutions. Some teams focus on pre-silicon emulation and verification for ODSP-related chips. Other teams focus on ASIC Design where they testbench with UVM methodology and test specific SOC designs at block/cluster/full chip levels. Other teams focus on powering the full range of network connectivity from the optics of the AI GPU boards to top of the rack optical fibers and active copper cables of the data centers and their fabrics. Across all groups youll collaborate with your direct team and cross-functional partners (across software physical design digital design and more) to deliver robust scalable solutions that enable Marvells leadership in data infrastructure.What You Can Expect
- Dive deep into the architecture of ourcutting-edgeprocessors and learn exactly how they function
- Use industry-standard tools to createpowerful simulation environments that mimic real-world conditions
- Developsmart automated tests that push our designs to their limitscreatively trying to break the chip to find& troubleshoothidden flaws&failed simulations
- Analyze test coverage results & metrics
- Collaboratewith chip architects and designers to solve complex problems and contribute toa teambuilding real products
What Were Looking For
- Currently enrolled in aBachelors DegreeinElectrical Engineering Computer Engineeringor a related field with an expected graduation datebetweenFall 2027 Summer 2028
- Completed courses focusing oncomputer architecturelogic processor memory systemVerilog VLSIVHDLUVManalog integrated circuit design digital logic design SoC/ASIC design verification principles signalssystemand signal processing
- Proficiencyin programming & scripting languages like Python C C Perl Java
- Experienceusingtoolslike Synopsys Cadence or Mentor to run simulations and write&debug a testbench
- Hands-on experience with RTL integration and bring-up system
- Experience with debugging complex hardware/software interactions
- Strong analysis problem solving and communication skills
Expected Base Pay Range (USD)
30 - 59 $ per hour.The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
This role is eligible to participate in Marvells bonus and equity plans including a new hire equity grant and annual equity refreshers ensuring you are rewarded for your contributions and remain invested in the companys long-term success.Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional comprehensive benefits that support our employees at every stage - from internship to retirement and through lifes most important moments. Our offerings are built around four key pillars: financial well-being family support mental and physical health and recognition. Highlights for our interns: medical dental and vision coverage perks and discounts robust mental health resources to prioritize emotional well-being and paid holidays. Additional compensation may be available for intern PhD candidates. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
Interview Integrity
To support fair and authentic hiring practices candidates are not permitted to use AI tools (such as transcription apps real-time answer generators like ChatGPT or Copilot or automated note-taking bots) during interviews.
These tools must not be used to record assist with or enhance responses in any way. Our interviews are designed to evaluate your individual experience thought process and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.
#LI-TT1Required Experience:
Intern
About Company
Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world’s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system-level knowledge ... View more