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Design Verification Engineer Performance Modelling
Job Location:
Job Location:
Mountain View, CA - USA
Monthly Salary:
Not provided by the employer
Monthly Salary:
Posted:
10 August 2026 (11 hours ago)
Posted:
Application Deadline:
7 November 2026
Application Deadline:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
Wipro Limited (NYSE: WIT BSE: 507685 NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting design engineering and operations we help clients realize their boldest ambitions and build future-ready sustainable businesses. With over 230000 employees and business partners across 65 countries we deliver on the promise of helping our customers colleagues and communities thrive in an ever-changing world. For additional information visit us at .
Mandatory Skills: VLSI HVL Verification. Experience: 3-5 Years.The expected compensation for this role ranges from $45000 to $121000 . Final compensation will depend on various factors including your geographical location minimum wage obligations skills and relevant experience. Based on the position the role is also eligible for Wipros standard benefits including a full range of medical and dental benefits options disability insurance paid time off (inclusive of sick leave) other paid and unpaid leave options. Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening subject to applicable state law. Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race color religion age sex national origin disability status genetics protected veteran status sexual orientation gender identity or expression or any other characteristic protected by federal state or local laws. Applications from veterans and people with disabilities are explicitly welcome. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them we need people inspired by reinvention. Of yourself your career and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention.
Job Description
| We need a DV engineer who has performance validation experience. Key Responsibilities Develop maintain and enhance STL (Scenario/Test List) generation scripts and performance validation infrastructure. Monitor performance regression status and track key performance indicators (KPIs) across IP and subsystem level verification environments. Analyze regression failures and collaborate with IP Design and DV owners to drive issue resolution. Debug verification tests that fail to meet defined performance metrics and benchmark targets. Create maintain and update performance test plans validation dashboards and result tracking reports. Develop and execute SystemVerilog/UVM-based testcases and regression suites. Drive verification closure through regression analysis debugging and coverage tracking. Automate validation and reporting workflows using Python Perl or Shell scripting. Work closely with architects designers software teams and validation engineers to ensure feature and performance signoff. Required Qualifications Bachelors or Masters degree in Electrical Engineering Computer Engineering Computer Science or related field. 5 years of Design Verification experience. Strong expertise in SystemVerilog and UVM. Experience developing and maintaining verification testbenches and regression environments. Strong debugging and root-cause analysis skills. Experience with verification planning test development and coverage closure. Proficiency in Python Perl or Shell scripting. Experience using industry-standard simulators and debug tools such as VCS Xcelium Questa Verdi or equivalent. Preferred Qualifications Experience with performance validation KPI tracking or performance regression analysis. Experience with CPU GPU AI/ML Multimedia Interconnect or SoC verification. Familiarity with performance benchmarking methodologies. Experience with emulation FPGA prototyping or post-silicon validation environments. Exposure to Formal Verification methodologies is a plus. Key Skills SystemVerilog UVM Python / Perl / Shell Regression Debugging Verification Planning Coverage Analysis Performance Validation KPI Tracking Root Cause Analysis SoC/IP Verification Tasks to be Owned Own and maintain healthy performance regression suites. Ensure performance KPIs are continuously tracked and reported. Drive timely debug and closure of performance-related test failures. Maintain accurate and up-to-date performance validation plans and dashboards. Partner effectively with cross-functional teams to achieve verification and performance signoff. |
Required Experience:
IC
About Company
As a global leader, Wipro blends consulting and AI expertise across design, engineering and operations to accelerate business transformation and deliver future-ready technology.
