AIML driven ASIC Design and Implementation Automation Engineer

As an AI/ML driven ASIC Design and Implementation Automation Engineer in our Advanced Chip Engineering (ACE) organization you will work in a dynamic environment to explore methodology flows and tools to improve efficiency and quality of results (power performance area and quality) for SoC and IP development teams across the organization. Youll be working and connecting with AI/ML and automation experts in the industry as well as academia to explore state-of-the-art AI/ML CAD techniques as a part of VLSI CAD SW prescribe key methods and requirements for tools & features to leverage for ASIC design.

In this role you will develop prototype solutions to evaluate various state-of-the-art AI/ML techniques to identify the best solutions for NXP designs. While exploring these new ways of working successful candidates will be working on actual designs and implementation to pilot and develop the automation.

This opportunity is within ACE Design Methodologies and Automation organization to enable transformation to leverage state-of-the-art AI/ML ideas to improve NXP designs for the Automotive Processors and Advanced microcontrollers in NXP.

The right candidate will be working in a fast-paced engineering environment on a leading-edge advanced node technologies enabling automated building of exciting and complex SoCs.

Job Summary

• Explore research ideas and solutions that bring AI/ML applications to VLSI design
• Work closely with Academic research communities in AI/ML for VLSI design Architecture teams IP and SoC designers and SoC Implementation teams from multiple sites to explore and evaluate for leading edge SoC technologies serving multiple industries
• These automation applications include use of GenAI Reinforcement Learning Graph Neural Networks and convolutional Networks
• Strong AI/ML expertise software and CAD background required

Cross Functional Aspects

• In this role the candidate will work with multiple NXP Engineering teams including Architecture IP & SoC design verification and implementation functions coordinate and drive groundbreaking initiatives for Digital Transformation.

Qualifications

• BS or MS in Computer Science Electrical Engineering Computer Engineering or related disciplines with strong background in SW development
• Hands-on expertise in programming using Python/C
• 1-2 years of experience in AI and ML techniques (LLMs CNN RNN and GraphNN) with experience of application to real world optimization problems
• Data structures algorithms and SW development for optimization problems
• Hands on experience in Unix/Linux revision control (Git BitBucket) SW development and debug tools
• Excellent analytical problem-solving skills
• Strong verbal and written communication skills

Desirable Skills/experience

• Strong understanding of design layout constraints (SDC Clocks CDC RDC) Static timing analysis Low-power and Power-aware flows (UPF)
• Prior experience in VLSI CAD methodology and tool development
• Good understanding of HDL: System Verilog Verilog VHDL front-end design physical design and layout implementation/generation flows and tools
• Understanding or prior experience with EDA tools for design verification DFT and implementation
• Experience with Design revision control (GIT DesignSync) and Make
• Splunk Jenkins LSF and CI/CD process

Job location:

• Austin TX

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age color national origin race religion creed gender sex sexual orientation gender identity and/or expression marital status status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal state or local addition NXP will provide reasonable accommodations for otherwise qualified disabled individuals.