Principal Process Integration Engineer

Why This Role

• Drive Core Technology: Lead the integration and development of advanced CMOS processes and Non-Volatile Memory (NVM) directly impacting product performance and market competitiveness.
• Lead Mass Production Breakthroughs: Take ownership of the critical path from New Product Introduction (NPI) to high-volume manufacturing defining technical specifications and Best Known Methods (BKM).
• Cross-Domain Collaboration: Bridge the gap between design teams and Tier-1 Foundries exerting technical influence at advanced process nodes (28nm and below).

Key Responsibilities

• Process Integration Leadership: Lead the design of CMOS and NVM process flows; optimize device performance to achieve industry-leading yield and reliability benchmarks.
• Deep Characterization & Analysis: Conduct statistical and Physical Failure Analysis (PFA) for fail modes; proactively identify process defects and drive optimization solutions.
• Yield Enhancement & Stability: Spearhead cross-functional yield improvement programs to ensure production stability and cost-efficiency.
• Foundry Management: Lead technical teams in collaboration with international major foundries managing technical alignment communication and process transfer.

Required Qualifications

• Education: Masters degree or PhD in Electronics Electrical Engineering Physics Materials Science or a related field.
• Experience: 10 years of semiconductor industry experience with a focus on CMOS logic processes or NVM technologies (eFlash RRAM MRAM).
• Data Insight: Proficiency in data analysis tools (e.g. JMP Python or Spotfire) with a proven ability to analyze complex statistical distributions and electrical characteristics.

Preferred Skills

• Process Transfer Expertise: Successful track record in Copy-Smart process migration ensuring process consistency and rapid yield ramp-up during technology transfer.
• BCD Process Expertise: Experience in BCD (Bipolar-CMOS-DMOS) process development or integration; familiarity with PMIC (Power Management IC) optimization.
• Advanced Node Experience: Proven experience in NVM integration and mass production at 28nm/16nm/12nm or beyond.
• Design Collaboration: Solid understanding of memory architecture NVM operation principles and peripheral circuit design.

Soft Qualities

• Analytical Thinking: Ability to synthesize complex data into actionable insights and identify root causes of technical anomalies.
• Proactive Ownership: Courage to transcend functional boundaries and mobilize resources to overcome technical bottlenecks.
• Effective Communication: Excellence in translating complex engineering issues into clear actionable optimization strategies for design and process teams.

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