Employer Active
Responsibilities:
• Understanding and executing JEDEC standards of memory Protocols.
• Design & Implement memories softmodels for emulation and Veloce environments.
• Develop and execute detailed block level and chip level digital designs.
• System level integration and running needed verification tasks on system level.
• Running and debugging simulation, emulation, and prototyping based verification environments.
• Running code check tools and code coverage tools and analyze reports.
• Run Synthesis of RTL code and analyze reports.
• Run static timing analysis and analyze reports.
Full Time