RTL Design Engineer

Hello

Hope you are doing well

This is Hari from Tek vivid INC I wanted to check if you or someone you know are interested in the following position.

Please go through the below requirement and please share an updated resume at your earliest convenience so that we may support your candidacy for the role. I sincerely appreciate you referring this requirement to anyone that you know who might be interested in case of your unavailability

Job Title: RTL Design Engineer Specialized

Work Location: San Jose CA 95124

Duration: 126onths

Work Type: Contract

Job Type: Hybrid (at least 3 days a week)

JOB Description:

KEY RESPONSIBILITIES:

• Microarchitecture development of IP subsystems
• Perform RTL design of digital components.
• Work with functional verification team to meet coverage and quality standards.
• Analyze/fix Lint and CDC errors of the components.
• Guarantee quality/timely deliverables meeting projects schedule.
• Help to improve/automate design process.
• Support postsilicon product bringup/debug.

PREFERRED EXPERIENCE:

• Knowledge of PCIe Gen5 and PIPE specification
• Knowledge of ASIC development flows
• Knowledge of system verilog
• Multiclock domain designs.
• Design constraints for synthesis and static timing analysis.
• Knowledge of AXI/AMBA protocol
• Knowledge of frontend RTL design tools and methodologies.
• Knowledge of frontend requirements and deliverables for verification validation physical design architecture security dfx power.
• Verification coverage testplan debug
• Physical design timing clock crossings reset crossings ECOs (manual formal)
• Ability to work and effectively collaborate with partners
• Experience with rtl simulation tools rtl linting tools reset domain crossings clock domain crossings synthesis RAM generation (area timing power SEU tradeoffs)
• Knowledge of scripting languages like Perl tcl or cshell

Sri Hari

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