Design Verification Engineer

About us

One team. Global challenges. Infinite opportunities. At Viasat were on a mission to deliver connections with the capacity to change the world. For more than 35 years Viasat has helped shape how consumers businesses governments and militaries around the globe communicate. Were looking for people who think big act fearlessly and create an inclusive environment that drives positive impact to join our team.

What youll do

At Viasat Government - Secure Network Systems (SNS) youll work with highly motivated engineers in an exciting and dynamic environment. You will use your engineering experience to develop the next generation of advanced communications products and systems.

As a Design Verification Engineer you will work closely with our RTL development engineers system architects and software engineers to verify functional correctness and robustness of the RTL powering our next generation FPGA-based secure communications systems. You will be responsible for RTL verification at both the unit and system level as well as creating and maintaining the verification environment and test cases. A key aspect of this job is closely collaborating across both small and large project teams to understand the functional and performance goals of the system use cases and edge cases and using that knowledge to develop effective test plans and test cases. Experience in RTL design and development and FPGA implementation is a plus and the ideal candidate will have the opportunity to work on both verification and design/implementation tasks.

The day-to-day

• Own the verification of custom RTL blocks subsystems and full FPGA-level functionality
• Work with RTL design engineers and system architects to define verification plans based on system specifications design goals and use cases
• Develop and maintain verification environment in SystemVerilog/UVM including constrained-random directed and system-level testbenches
• Develop and maintain stimulus generators drivers monitors scoreboards sequences and model predictors for a variety of interfaces
• Work closely with RTL design engineers to triage and resolve bugs owning and driving technical issues to resolution
• Collect and report code and functional coverage
• Maintain regular simulation regressions

What youll need

• Bachelors Degree in Electrical Engineering Computer Engineering or a related field
• 5 years experience in hardware verification using SystemVerilog/UVM
• Proven success verifying complex RTL designs in industry-standard flows including creation and maintenance of verification environment test benches and test cases
• Proficient in SystemVerilog UVM and common simulation and debug tools including Siemens Questa
• Experience with Object Oriented Programming
• Experience with industry standard EDA tools (Cadence Synopsys and/or Mentor)
• Foundational knowledge of digital logic and timing considerations
• Strong written and verbal communication skills ability to work with a geographically distributed team
• Attention to detail ability to follow process and coding guidelines participate in code reviews and accept feedback
• Desire to be a member of a team collaborating on large system designs
• Work independently take initiative and take ownership of tasks and results
• US citizenship required
• Active United States Secret Security Clearance
• Ability to travel up to 10%
  
  This is a 100% on-site role working from our office in one of these locations: Carlsbad CA

What will help you on the job

• MSEE or MSCE degree preferred
• Experience with Programmable Logic EDA tools including AMD/Xilinx Vivado Altera Quartus and Microchip Libero
• Experience with the FPGA design process from the requirements phase to documentation design implementation of source code place & route testing in hardware and integration
• Familiarity with TCL Perl Python or another scripting language
• Experience with high-speed interfaces like SERDES DDR2/3/4 LVDS
• Proven experience in debugging diagnosing and solving embedded designs issues
• Experience and familiarity with Linux-based development environments

Salary range

At Viasat we consider many factors when it comes to compensation including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge skills and experience. Additional cash or stock incentives may be provided as part of the compensation package in addition to a range of medical financial and/or other benefits dependent on the position offered. Learn more about Viasats comprehensive benefit offerings that are focused on your holistic health and wellness at Statement

Viasat is proud to be an equal opportunity employer seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race color religion gender gender identity or expression sexual orientation national origin ancestry physical or mental disability medical condition marital status genetics age or veteran status or any other applicable legally protected status or characteristic.