Power Design Engineer – Data Center Accelerator Boards

The Role:

We are looking for a Power Design Engineer to own the power delivery architecture and implementation for our accelerator PCBs used in data center servers for HPC and AI/ML workloads. You will be responsible for highcurrent highefficiency VRM design power tree definition and ensuring robust power integrity for advanced accelerator SoCs and highspeed memory.

Responsibilities:

Architect and design the power supply and board-level power delivery network (PDN) for accelerator cards and related platforms:

o Define power trees rails sequencing and margining

o Select VRMs DCDC converters controllers FETs magnetics and protection components

o Investigate PCB technology options and define power delivery strategies for high-current low-voltage environments

Enable the supply chain and work with suppliers over the full lifecycle

Perform schematic design for power stages and collaborate with layout engineers to ensure proper placement routing and copper utilization for highcurrent paths.

Work closely with PI/SI engineers on PDN impedance decoupling strategies and transient performance.

Specify and guide power-on sequencing monitoring and telemetry (PMBus I2C etc.).

Conduct lab validation of power subsystems:

o Efficiency ripple transient response stability

o Load/line regulation and thermal performance

Lead debug of power-related issues (e.g. startup failures droop noise coupling OCP/OVP events).

Collaborate with silicon hardware system reliability and manufacturing teams to ensure design-for-reliability (DFR) and design-for-manufacturability (DFM) of power solutions.

Generate design documentation test plans and bringup procedures.

Required Qualifications:

Bachelors and Masters degree in Electrical Engineering or related field.

5 years of experience in board-level power design for highperformance or serverclass systems.

Strong understanding of:

o Switching power converters (buck multiphase POL regulators)

o Power topologies compensation and stability

o Highcurrent layout techniques and loss optimization

Handson experience with schematic capture (e.g. Siemens Xpedition) and familiarity with PCB layout constraint definition.

Proficiency with lab equipment (oscilloscopes electronic loads power analyzers DMMs).

Preferred Qualifications:

Experience designing power delivery for GPUs CPUs FPGAs or custom accelerators in data center environments.

Familiarity with PI simulation concepts and tools (e.g. CADENCE PowerSI PowerDC OptimizePI VRM simulation (SIMetrix/SIMPLIS) etc.).

Working knowledge of server power standards hotplug derating and redundancy considerations.

Relevant experience in Long-Term Reliability prediction and testing (e.g. MTBF FMEA FIT HTOL/HAST).

Compliance Certification and Regulatory requirements knowledge for Power Delivery Designs and Qualification.

Experience with PMBus configuration and debugging.

Basic scripting skills for test automation (Python LabVIEW etc.).

What do we offer

Join an innovative team and experience company growth.

We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.

Enjoy a hybrid work environment.

We also offer flexible schedule.

We offer a remuneration that values your experience.

The position will have preferably the base in Karlsruhe (Germany).

We are looking for outstanding people willing to join our mission to change this industry and help to build a better world.

If you feel identified with Openchip please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to keep a balance between your personal and professional life.

At Openchip & Software Technologies S.L. we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued respected and empowered to reach their full potential regardless of race gender ethnicity sexual orientation or gender identity.