Openchip And Software Technologies SL

The roleAs Senior AI Kernel Optimization Engineer you will lead the optimization of high-performance kernels to push the limits of AI Inference on Openchip RISC-V platforms.You will design implement and optimize AI compute kernels (Gen AI Large Language Model AI Vision CNNs etc) and r

The roleAs Senior AI Kernel Optimization Engineer you will lead the optimization of high-performance kernels to push the limits of AI Inference on Openchip RISC-V platforms.You will design implement and optimize AI compute kernels (Gen AI Large Language Model AI Vision CNNs etc) and r

We are looking for a hands-on and proactive IT Support Specialist to join our IT organization at Openchip. You will be part of the Service Desk team based in Barcelona reporting to the Service Desk Lead. The Service Desk team and IT team in Barcelona have the mission to ensure seamles

We are looking for a hands-on and proactive IT Support Specialist to join our IT organization at Openchip. You will be part of the Service Desk team based in Barcelona reporting to the Service Desk Lead. The Service Desk team and IT team in Barcelona have the mission to ensure seamles

The Role:In the Innovation department we are seeking an experienced FPGA Engineer to work on the design prototyping and validation of complex FPGA-based systems with a strong focus on RISC-V-based platforms high-performance digital design and advanced system-level prototyping in mixed

The Role:In the Innovation department we are seeking an experienced FPGA Engineer to work on the design prototyping and validation of complex FPGA-based systems with a strong focus on RISC-V-based platforms high-performance digital design and advanced system-level prototyping in mixed

The Role:The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. Building on top of industry-standard compiler frameworks like LLVM your role is to develop the components that will enable the use of Openchips novel hardware fe

The Role:The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. Building on top of industry-standard compiler frameworks like LLVM your role is to develop the components that will enable the use of Openchips novel hardware fe

The Role:We are seeking a Power Integrity Simulation Engineer to own the modeling simulation and optimization of the power delivery network (PDN) for our accelerator boards. You will work closely with power board design and package teams to ensure stable lownoise power for highcurrent

The Role:We are seeking a Power Integrity Simulation Engineer to own the modeling simulation and optimization of the power delivery network (PDN) for our accelerator boards. You will work closely with power board design and package teams to ensure stable lownoise power for highcurrent

The Role:As a Physical Design Staff Engineer you will serve as the technical reference point for the most complex digital blocks (high-speed mixed-signal control or automotive low-power). You will operate at the intersection of logic and physics ensuring that the functional design int

The Role:As a Physical Design Staff Engineer you will serve as the technical reference point for the most complex digital blocks (high-speed mixed-signal control or automotive low-power). You will operate at the intersection of logic and physics ensuring that the functional design int

The Role:As a Physical Design Senior Engineer you will take technical ownership of the implementation for highly complex digital blocks including high-speed interfaces mixed-signal control logic and automotive low-power modules. Working at the intersection of logic and physics you are

The Role:As a Physical Design Senior Engineer you will take technical ownership of the implementation for highly complex digital blocks including high-speed interfaces mixed-signal control logic and automotive low-power modules. Working at the intersection of logic and physics you are

The Role:We are hiring a Toolchain Integrator / Librarian to own and streamline the EDA/PCB design tool ecosystem that powers our accelerator board development. You will be responsible for maintaining our schematic/PCB tool flows managing libraries and PDKs and enabling a smooth consi

The Role:We are hiring a Toolchain Integrator / Librarian to own and streamline the EDA/PCB design tool ecosystem that powers our accelerator board development. You will be responsible for maintaining our schematic/PCB tool flows managing libraries and PDKs and enabling a smooth consi

The Role:We are looking for a Hardware Validation Engineer to lead boardlevel bringup and validation of our accelerator cards used in HPC and AI/ML servers. You will work handson in the lab validating power signal integrity at the system level thermal performance and overall functiona

The Role:We are looking for a Hardware Validation Engineer to lead boardlevel bringup and validation of our accelerator cards used in HPC and AI/ML servers. You will work handson in the lab validating power signal integrity at the system level thermal performance and overall functiona

The Role:We are seeking a Thermal & Mechanical Design Engineer to support the development of nextgeneration accelerator boards used in data center servers for HPC and AI/ML workloads. You will work closely with our senior thermal/mechanical architect to design analyze and validate coo

The Role:We are seeking a Thermal & Mechanical Design Engineer to support the development of nextgeneration accelerator boards used in data center servers for HPC and AI/ML workloads. You will work closely with our senior thermal/mechanical architect to design analyze and validate coo

The Role:We are looking for a motivated and technically skilled candidate to develop an on-chip interconnect network framework and simulation environment ready to build different NoC architectures effectively to perform design space exploration and evaluate different configurations in

The Role:We are looking for a motivated and technically skilled candidate to develop an on-chip interconnect network framework and simulation environment ready to build different NoC architectures effectively to perform design space exploration and evaluate different configurations in

The Role:In the Innovation department we are seeking a highly experienced Senior ASIC Engineer / Technical Lead to drive the architecture design and implementation of advanced ASIC and SoC developments with a strong focus on RISC-V-based systems high-performance digital design and com

The Role:In the Innovation department we are seeking a highly experienced Senior ASIC Engineer / Technical Lead to drive the architecture design and implementation of advanced ASIC and SoC developments with a strong focus on RISC-V-based systems high-performance digital design and com