SoC Validation Engineer

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profile Job Location:

Hyderabad - India

profile Monthly Salary: Not Disclosed
Posted on: 10 days ago
Vacancies: 1 Vacancy

Job Summary

SoC Validation Engineer

Experience: 7 – 10 Years
Budget: 20 – 25 LPA
Location: Hyderabad

Key Responsibilities:

  • Develop and execute verification strategies
  • Create and debug testbenches
  • Perform SoC validation and verification

Required Skills:

  • Strong experience in Verilog/SystemVerilog
  • Hands-on experience with UVM methodology
  • Strong debugging skills
  • Knowledge of Digital Design Fundamentals
  • AMBA protocols (AXI AHB APB) – Good to have
  • Scripting: Perl TCL Shell Make
  • Exposure to ARM-based SoC (Preferred)

Client Requirements (Mandatory for Submission):

  • Immediate joiners preferred
  • Resume must be well-structured and client-ready
  • Each project must include timeline and duration
  • Verification/UVM experience must be from client projects
  • Candidate should be comfortable with technical coding/debugging rounds
  • Must be available for post-selection customer discussions (2 rounds)

Candidate Submission Details (Mandatory for All Roles)

  • Candidate Name
  • Role/Skill
  • Vendor Name
  • Total Experience
  • Current Location
  • Preferred Location
  • Notice Period
  • Current Salary (Monthly)
  • Expected Salary (Monthly)
SoC Validation EngineerExperience: 7 – 10 YearsBudget: 20 – 25 LPALocation: HyderabadKey Responsibilities:Develop and execute verification strategiesCreate and debug testbenchesPerform SoC validation and verificationRequired Skills:Strong experience in Verilog/SystemVerilogHands-on experience with U...
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