Data Converter Design Architect (ADCDAC)

Data Converter Design Architect (ADC/DAC)

Location: Noida U P
Work Mode: Onsite
Experience: 5 15 Years

The role involves leading the architecture design and silicon validation of high-performance data converters including ADCs and DACs for mixed-signal semiconductor applications. The candidate will define system-level specifications drive architectural trade-offs and ensure performance targets across PVT conditions.

This position requires strong expertise in analog/mixed-signal design along with hands-on silicon validation and cross-functional collaboration.

• Define architecture for ADCs (SAR Pipeline Sigma-Delta) and DACs (Current-Steering R-2R Sigma-Delta)
• Design and optimize key analog blocks such as Sample & Hold comparators references DAC arrays and clocking circuits
• Drive key performance metrics including SNR ENOB SFDR resolution speed power and area
• Analyze and optimize noise linearity matching and dynamic performance across PVT conditions
• Develop calibration trimming and digital correction techniques for performance improvement
• Ensure robust clocking schemes synchronization and digital interface integration
• Perform system-level modeling and validation using MATLAB/Python
• Lead silicon bring-up debugging and characterization in lab environment
• Collaborate with digital layout and system teams for full-chip integration
• Conduct design reviews and guide architectural decisions
• Mentor junior engineers and support technical development of the team

• / PhD in Electronics Electrical Engineering or related field
• 5 10 years of experience in Analog / Mixed-Signal IC Design
• Proven track record of successful silicon in ADC and/or DAC designs

• ADC Architectures: SAR Pipeline ADC Sigma-Delta ADC
• DAC Architectures: Current-Steering DAC R-2R DAC Sigma-Delta DAC

• Noise analysis linearity dynamic range jitter sampling theory
• Mismatch analysis and mitigation techniques

• Comparators amplifiers voltage/current references
• Sample & Hold circuits switches DAC arrays

• Cadence Virtuoso
• Spectre / Analog simulation tools
• MATLAB / Python for modeling and analysis

• Lab measurement characterization and debugging
• Performance validation across PVT corners

• Experience with advanced CMOS technology nodes
• Exposure to DSP-based calibration techniques
• Experience with high-speed or high-resolution data converters
• Understanding of system-level integration and signal chain design
  
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