FPGAASIC Verification Engineer

Grammar LLC

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profile Job Location:

Columbia, IN - USA

profile Monthly Salary: Not Disclosed
Posted on: Yesterday
Vacancies: 1 Vacancy

Job Summary

Role: FPGA/ASIC Verification Engineer

Job Schedule: 9/80: Employees work 9 out of every 14 days totaling 80 hours worked and have every other Friday off OR 5/8: Employees work 8 hours per day 5 days a week

Job Description:

Join our team at the company and play a critical role in developing secure cutting-edge tactical communication systems that protect those who protect us. As an FPGA Verification Engineer youll collaborate with a talented mission-driven team verifying next-generation FPGA solutions for our radios used by military and first responders worldwide. This is a hands-on opportunity to grow your expertise in UVM advanced verification methodologies and complex communication systemswhile enjoying work-life balance with flexible schedules and every other Friday off.

You will function primarily in an FPGA verification role working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Were seeking familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. You will be required to analyze requirements create test specifications/plans write tests in System Verilog within a UVM test bench framework and verify designs meet requirements. You will work with cross functional teams to verify FPGA designs for radio product development projects.

Essential Functions:

Perform FPGA design verification and validation of embedded electronic communication.

Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications.

Develop self-checking test benches for FPGA design verification and validation using System Verilog.

Develop Agents Test sequences Cover groups Predictors Scoreboards.

Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals.

Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications.

Work with cross functional teams as needed to define and verify product and design requirements.

Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.

Ability to obtain and maintain US Security Clearance.

Qualifications:

Bachelors Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related lieu of a degree minimum of 10 years of prior related experience.

Experience developing and verifying FPGA/ASIC based embedded system solutions.

Preferred Additional Skills:

Demonstrated ability to analyze and debug FPGA firmware and related hardware issues.

Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.

Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems.

Experience with Mentor Graphics Verification tools.

FPGA/ASIC RTL Design experience.

Proficiency in Object Oriented Programming (C JAVA).

Proven proficiency in FPGA/ASIC verification using System Verilog.

Working knowledge of UVM/OVM methodology.

Experience with Advanced Functional Verification tools to report functional coverage.

Experience with scripting languages (Bash Perl Python Tcl).

Familiarity in working within Linux OS.

Familiarity with industry standard interfaces (Ethernet AXI SPI).

Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.

Highly motivated self-starter who works well in team environments.

In compliance with pay transparency requirements the salary range for this role in New York State is $90500-$168500. The salary range for this role in Maryland is $106500 - $197500. This is not a guarantee of compensation or salary as final offer amount may vary based on factors including but not limited to experience and geographic location. Our company also offers a variety of benefits including health and disability insurance 401(k) match flexible spending accounts EAP education assistance parental leave paid time off and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire schedule type and the applicability of collective bargaining agreements.

Role: FPGA/ASIC Verification EngineerJob Schedule: 9/80: Employees work 9 out of every 14 days totaling 80 hours worked and have every other Friday off OR 5/8: Employees work 8 hours per day 5 days a weekJob Description:Join our team at the company and play a critical role in developing secure cut...
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