Thales is a global technology leader trusted by governments institutions and enterprises to tackle their most demanding challenges. From quantum applications and artificial intelligence to cybersecurity and 6G innovation our solutions empower critical decisions rooted in human intelligence. Operating at the forefront of aerospace and space cybersecurity and digital identity were driven by a mission to build a future we can all trust.
Present in India since 1953 Thales is headquartered in Noida and has other operational offices and sites spread across Delhi Gurugram Bengaluru and Mumbai among others. Over 2200 employees are working with Thales and its joint ventures in India. Since the beginning Thales has been playing an essential role in Indias growth story by sharing its technologies and expertise in Defence Aerospace and Cyber & Digital sectors. Thales has two engineering competence centres in India - one in Noida focused on Cyber & Digital business while the one in Bengaluru focuses on hardware software and systems engineering capabilities for both the civil and defence sectors serving global needs. The Group has also established an MRO (Maintenance Repair & Overhaul) facility in Gurugram to provide comprehensive avionics maintenance and repair services to Indian airlines and support the growth of the local aviation industry.Technical Lead FPGA Verification (SV-UVM & DO-254)
Position Overview
The Thales India Engineering Competency Center (ECC) is seeking a Hands-on Technical Lead for FPGA IVV. This is a dual-impact role: you will act as a player and a technical coach to elevate the teams skills while remaining directly involved in the execution of complex verification activities. You will be the driving force behind our transition to SV-UVM and the guarantor of DO-254 excellence.
Qualifications
Experience: 10 years in FPGA Verification.
Industry: Aerospace or Defense background is mandatory.
Education: or Masters in Electronics & Communication
Required Skills:
Key Responsibilities:
1. Strategic Coaching & Mentorship
Technical Guidance: Provide daily coaching to the engineering team on SV-UVM best practices and advanced debugging techniques.
Skill Uplift: Conduct code reviews and architecture workshops to transition the team from directed testing to coverage-driven verification.
Best Practices: Establish and maintain high-quality coding standards for SV-UVM and documentation for DO-254.
2. Operational Execution
Environment Development: Directly architect and code critical UVM components (BFMs Scoreboards) and complex test scenarios.
Complex Interface Validation: Personally lead the verification of high-speed/critical protocols (PCIe AXI4 ARINC 818/664 A664 ).
Problem Solving: Take the lead on the most challenging technical bottlenecks from simulation mismatches to physical hardware-software integration issues.
3. Certification & Delivery (DO-254).
End-to-End Ownership: Be accountable for the full verification cycle (DAL A/B) ensuring 100% traceability between requirements and test results.
Artifact Production: Hands-on drafting and review of critical certification documents.
Schedule & Risk: Lead technical estimation planning and risk mitigation for the IVV scope.
Critical Competencies
Expert SV-UVM (Active Practitioner): Current hands-on experience in building UVM environments; not just managing them. Advanced Protocols: Deep technical knowledge of AXI4 PCIe and ARINC standards. DO-254 Mastery: Proven track record of taking FPGAs through the full certification lifecycle. Mentoring & Pedagogy: Ability to explain complex concepts clearly and upskill a team. Tool Mastery: Advanced user of Questasim (simulation). Automation: Capable of developing Python/TCL scripts to optimize the verification flow. Project Stewardship: Ability to balance technical execution with planning and reporting.
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