Analog Design Engineer – High-Speed Interface (PHY SerDes)
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Job Location:
Monthly Salary:
Posted on:
16 hours ago
Vacancies:
1 Vacancy
Job Summary
Analog Design Engineer High-Speed Interface (PHY / SerDes)
- Location: Bangalore
- Work Mode: Onsite
- Experience: 4 7 Years
This role focuses on the design and development of high-speed analog and mixed-signal circuits for interface PHY IPs. The engineer will contribute to key building blocks such as transmitters receivers and clocking systems used in advanced semiconductor technologies. The position requires hands-on experience in analog design for high-speed serial interfaces and familiarity with advanced process nodes.
2. Key Responsibilities- Design and develop high-speed analog and mixed-signal blocks for PHY IPs
- #LI-VA1Work on transmitter receiver clocking equalizer and SerDes architectures
- Develop circuits for high-speed interfaces such as PCIe and die-to-die interconnects
- Perform schematic design simulation and verification of analog circuits
- Collaborate with cross-functional teams including digital layout and validation
- Ensure design compliance with process technology constraints (FinFET GAA)
- Perform EMIR reliability and PERC checks during design cycles
- Optimize performance parameters such as power area and signal integrity
- Support integration of analog blocks into larger SoC environments
- Participate in design reviews and provide technical inputs
- Contribute to debugging and analysis during silicon bring-up (if applicable)
- Work across multiple product lines and adapt to changing requirements
- B.E / / M.E / in Electronics Electrical Engineering or related field
- 4 7 years of experience in analog or mixed-signal design
- Experience in high-speed interface design environments
Analog & Mixed-Signal Design
- High-speed analog circuit design
- Mixed-signal block development
- Low-power and high-performance design techniques
High-Speed Interfaces / PHY
- PCIe UCIe Die-to-Die interfaces
- SerDes architecture (serializer/deserializer)
- Transmitter Receiver Equalizer Clocking circuits
Process Technologies
- FinFET and GAA nodes
- Advanced node design considerations
EDA Tools & Design Flow
- Analog simulation and verification tools
- EMIR (Electromigration and IR Drop)
- Reliability analysis and PERC checks
Validation & Debug (Optional Exposure)
- Silicon bring-up
- Lab validation and debugging
