Senior Analog Layout Engineer

Kuala Lumpur - Malaysia

Monthly Salary: Not Disclosed

Posted on: Yesterday

Vacancies: 1 Vacancy

Job Summary

Key Responsibilities

Custom Analog Layout Execution

Perform fullcustom analog layout for critical circuit blocks including:
- Analog Front Ends (AFEs)
- ADCs and DACs
- PLLs and clocking circuits
- Voltage regulators and references
- Analog filters and bias circuits
Translate schematics into highquality siliconproven layouts in advanced nodes.
Apply bestinclass techniques for:
- Matching and symmetry
- Parasitic control
- Noise isolation and substrate coupling mitigation
- EM/IR and reliability robustness

Verification & Signoff

Run and debug DRC LVS ERC and reliability checks.
Work with designers to close LVS and performance issues.
Support PEX extraction and simulation correlation.
Ensure layouts meet foundry design rules and signoff requirements.

Collaboration & Production Support

Partner closely with analog circuit designers CAD and methodology teams.
Participate in layout and design reviews.
Support silicon bringup debug and yield improvement as needed.
Contribute to layout guidelines documentation and best practices.

Required Qualifications

Education

BSEE or equivalent in Electrical / Electronics Engineering (preferred).

Experience

610 years of handson experience in custom analog / mixedsignal layout.
Proven experience working in 28nm 22nm and/or 16nm CMOS process technologies.
Demonstrated experience laying out complex analog IP blocks (AFE ADC DAC PLL regulators).

Tools & Methodologies

Strong proficiency with:
- Cadence Virtuoso Layout Suite
- Calibre (DRC LVS PEX)
Solid understanding of:
- Foundry design rules
- Device matching and layoutdependent effects
- Parasitics coupling and noise mitigation
- Reliability (EM IR ESD awareness)
Familiarity with advanced-node layout challenges is required.

Preferred Qualifications

Experience in automotive or highreliability semiconductor products.
Familiarity with lownoise highspeed analog layouts.
Ability to mentor junior layout engineers.
Exposure to ISO / automotive quality flows is a plus.

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Required Experience:

Senior IC

Key ResponsibilitiesCustom Analog Layout ExecutionPerform fullcustom analog layout for critical circuit blocks including:Analog Front Ends (AFEs)ADCs and DACsPLLs and clocking circuitsVoltage regulators and referencesAnalog filters and bias circuitsTranslate schematics into highquality siliconproven...