Senior Emulation FPGA Prototyping Engineer

Job Title: Senior Emulation / FPGA Prototyping Engineer / Location : Pune

Role Summary:

We are seeking a skilled and motivated FPGA Prototyping/Emulation Engineer to join our hardware design team. The ideal candidate will have hands-on experience in FPGA-based prototyping and emulation of complex SoC designs and will work closely with RTL designers verification engineers and software teams to enable early software development and system validation.

The candidate should be able to lead define and execute a long term strategy for Pre-Si using emulation/FPGA-prototyping platforms. Optimize and automate emulation infrastructure and enable hardware/software/firmware/validation teams for successful and swift execution of microcontroller SoCs.

Job Description:

• FPGA-based Pre-Silicon validation Platform development for IP and Subsystems
• IP/SS Design porting and implementation for FPGA
• Development & bring-up of Pre-Silicon Validation platforms like HAPS-100/Veloce / Palladium/ZeBU or FPGA for the IP/SOC Validation
• Development and execution of system use case scenarios
• Ability to work well as part of a team Knowledge/Skills
• 8-15 years of experience in developing FPGA-based prototype platforms for multi-million gate IP/Subsystem/SoC
• Should be able to understand system level environment for MicroControllers
• Planning Test strategy creating test plan and test code development to address functional and performance requirements of the IP/Subsystem.
• Experience with Verilog/System Verilog/VHDL and working knowledge of C/C
• Working knowledge of one more of the industry standard Emulation platforms like Veloce / HAPS / Palladium platform
• Expertise in using validation environment test equipment e.g. Logic Analyzers Oscilloscope Protocol Analyzers etc.
• Experience in working on ARM/RISC-V core architectures would be an advantage.

Key Responsibilities:

• Develop and maintain Emulation / FPGA-based prototyping platforms for pre-silicon validation.
• Integrate and debug RTL blocks on FPGA platforms (e.g. Xilinx Intel/Altera).
• Collaborate with design and verification teams to bring up emulation environments.
• Optimize FPGA resource usage and timing closure for large-scale designs.
• Support software teams with early access to hardware through emulation/prototyping.
• Automate build and deployment flows using scripting languages (Python Tcl Shell).
• Document design flows debug procedures and provide training/support to internal teams.

Technical skill Required :

• Bachelors or Masters degree in Electrical Engineering Computer Engineering or related field.
• 8-15 years of hands-on experience in FPGA prototyping or emulation.
• Strong understanding of digital design fundamentals and RTL (Verilog/SystemVerilog).
• Experience with FPGA tools such as Vivado Quartus Synplify or similar.
• Familiarity with at least some of the emulation platforms like Veloce HAPS-100 Palladium or Zebu is a important
• Proficiency in scripting languages (Python Perl Tcl).
• Good problem-solving and debugging skills.
• Excellent communication and teamwork abilities.

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