Sr Digital Synthesis Engineer, HBM
Richardson, TX - USA
Job Summary
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence inspiring the world to learn communicate and advance faster than ever.
Responsibilities will include but are not limited to:
- Translate system requirements into timing power and area budgets in partnership with physical layer (PHY) and system architects and maintain clear interface specifications for bus protocols clockdomain crossing (CDC) and reset strategy.
- Build and integrate synthesizable registertransfer level (RTL) designs in SystemVerilog including multichannel logic interrupts events register maps scan hooks and designfortest (DFT) interfaces.
- Ensure stable reset and powerup behavior manage cornercase scenarios and maintain clear engineering change order (ECO) paths.
- Collaborate with design verification teams to develop verification plans achieve coverage goals complete CDC and resetdomain crossing (RDC) checks and debug RTL testbench and gatelevel issues.
- Define and refine timing constraints for clocks exceptions and path intent and optimize microarchitecture to resolve timingcritical paths.
- Partner with DFT and test teams to integrate scan memory builtin selftest (MBIST) logic builtin selftest (LBIST) boundary access and debug instrumentation.
- Support postsilicon validation by enabling debug hooks correlating silicon issues to RTL or architecture and accelerating issue resolution.
Minimum Qualifications:
- Bachelors degree or Masters degree in Electrical Engineering or Computer Engineering or equivalent practical experience.
- Typically 10 years of experience in digital build or systemonchip (SoC) integration with ownership of complex logic through tapeout.
- Strong expertise in SystemVerilog RTL development clock and reset architecture clockdomain crossing (CDC) resetdomain crossing (RDC) and lowpower design techniques such as clock gating and powerstate management.
- Solid understanding of designfortest (DFT) and designfordebug fundamentals and experience coordinating multifunctional technical efforts.
Preferred Qualifications:
- Experience supporting postsilicon validation through structured debug correlation and issue resolution.
- Exposure to integrating scan memory builtin selftest (MBIST) logic builtin selftest (LBIST) and related test or debug features.
- Experience developing verification plans and partnering with design verification teams to achieve coverage goals.
- Ability to refine microarchitecture to improve timing and mentor others on effective constraint development.
As a world leader in the semiconductor industry Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well provide peace of mind and help you prepare for the future. We offer a choice of medical dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury and paid family leave. Additionally Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available please see the Benefits Guide posted on is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race color religion sex sexual orientation age national origin citizenship status disability protected veteran status gender identity or any other factor protected by applicable federal state or local laws.
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Required Experience:
Senior IC
About Company
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