Staff or Principal Test Engineer
Location: Irvine CA
Key Responsibilities:
Technical Ownership:
Own test engineering solutions across all product phases: silicon bring-up characterization customer sampling qualification and high-volume manufacturing.
Test Architecture & Strategy:
Define test strategy coverage goals and manufacturing methodologies; develop comprehensive product Test Plans and drive DFT alignment.
ATE Solution Leadership:
Lead all aspects of the test solution including:
Test programs and automation
ATE hardware platforms
Probe cards load boards fixturing and mechanical interfaces
Cross-Functional Leadership:
Act as a core team member for new product introduction participating in architecture reviews testability/DFT reviews and quality trade-off decisions.
Coverage & Optimization:
Partner with Design Engineering to ensure high test coverage yield optimization and test time targets.
Correlation & Characterization:
Correlate ATE results with bench validation data; characterize device performance and margins for volume production.
Manufacturing Readiness:
Coordinate with internal manufacturing technology partners and sub-cons to drive NPI test release and volume ramp.
Mentorship & Influence:
Provide technical guidance to other test engineers and help shape long-term test infrastructure and standards.
Required Qualifications:
Bachelors degree in electrical engineering or related field with 10 years of test engineering experience (Masters preferred).
Expert-level experience with Advantest 93K and/or Teradyne Uflex platforms.
Strong background in mixed-signal ATE development for complex SoCs including:
- High-speed ADC/DAC
- SERDES
- DSP-based devices
Solid understanding of Scan MBIST and loop-back test methodologies.
Preferred Qualifications:
Familiarity with bench instrumentation such as Network Analyzers and Sampling Oscilloscopes.
At-speed wafer probe experience.
Experience with schematic capture PCB layout and 2D/3D CAD tools.
Required Experience:
Staff IC
Staff or Principal Test EngineerLocation: Irvine CAKey Responsibilities:Technical Ownership: Own test engineering solutions across all product phases: silicon bring-up characterization customer sampling qualification and high-volume manufacturing.Test Architecture & Strategy: Define test strategy co...
Staff or Principal Test Engineer
Location: Irvine CA
Key Responsibilities:
Technical Ownership:
Own test engineering solutions across all product phases: silicon bring-up characterization customer sampling qualification and high-volume manufacturing.
Test Architecture & Strategy:
Define test strategy coverage goals and manufacturing methodologies; develop comprehensive product Test Plans and drive DFT alignment.
ATE Solution Leadership:
Lead all aspects of the test solution including:
Test programs and automation
ATE hardware platforms
Probe cards load boards fixturing and mechanical interfaces
Cross-Functional Leadership:
Act as a core team member for new product introduction participating in architecture reviews testability/DFT reviews and quality trade-off decisions.
Coverage & Optimization:
Partner with Design Engineering to ensure high test coverage yield optimization and test time targets.
Correlation & Characterization:
Correlate ATE results with bench validation data; characterize device performance and margins for volume production.
Manufacturing Readiness:
Coordinate with internal manufacturing technology partners and sub-cons to drive NPI test release and volume ramp.
Mentorship & Influence:
Provide technical guidance to other test engineers and help shape long-term test infrastructure and standards.
Required Qualifications:
Bachelors degree in electrical engineering or related field with 10 years of test engineering experience (Masters preferred).
Expert-level experience with Advantest 93K and/or Teradyne Uflex platforms.
Strong background in mixed-signal ATE development for complex SoCs including:
- High-speed ADC/DAC
- SERDES
- DSP-based devices
Solid understanding of Scan MBIST and loop-back test methodologies.
Preferred Qualifications:
Familiarity with bench instrumentation such as Network Analyzers and Sampling Oscilloscopes.
At-speed wafer probe experience.
Experience with schematic capture PCB layout and 2D/3D CAD tools.
Required Experience:
Staff IC
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