We are seeking a Systems Design Engineer (Emulation and Prototyping) Intermediate to join our team. This role will involve developing and debugging hardware emulation models performing pre-silicon verification and supporting SoC bring-up and validation activities. The ideal candidate will have experience in FPGA design RTL development emulation platforms and hardware verification along with a passion for semiconductor design and advanced hardware systems.
Job Title: Systems Design Engineer (Emulation and Prototyping) Intermediate / Systems Design Engineer (Emulation and Prototyping) Intermediate / Systems Design Engineer (Emulation and Prototyping) Intermediate / Systems Design Engineer (Emulation and Prototyping) Intermediate / Systems Design Engineer (Emulation and Prototyping) Intermediate
Location: San Jose CA (Hybrid 3 days onsite: Tue Wed Thu)
Duration: 12 months
Job Description: The Systems Design Engineer (Emulation and Prototyping) Intermediate is responsible for developing and maintaining hardware emulation environments for complex SoC designs. This role focuses on enabling pre-silicon verification and validation by building and debugging emulation models and FPGA-based prototypes.
The engineer will work closely with cross-functional teams to import RTL designs resolve synthesis and non-synthesis issues and ensure functional correctness and performance. This position requires hands-on expertise in RTL design FPGA platforms and debugging tools along with the ability to partition large-scale SoC designs across multi-FPGA systems.
Additionally the role involves developing automation scripts integrating high-speed interfaces and supporting end-to-end silicon lifecycle activities from pre-silicon validation to post-silicon bring-up.
Key Responsibilities: -
Develop and maintain hardware emulation models for SoC designs.
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Import and validate RTL designs; provide patches to resolve synthesis and non-synthesis issues.
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Compile and debug emulation models across bring-up validation and production phases.
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Perform pre-silicon verification and validation to ensure design functionality and performance.
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Partition large SoC RTL designs across multi-FPGA platforms (3 4 years of relevant experience required).
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Develop and maintain FPGA build infrastructure including scripts flows and makefiles.
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Integrate transactors high-speed interfaces and debugging instrumentation.
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Work with pre-silicon and post-silicon tools methodologies and workflows.
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Collaborate with engineering teams to support SoC bring-up and system-level validation.
Required Skills & Experience: Technical Skills:
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FPGA design and development experience (3 5 years)
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Strong RTL design expertise using Verilog/SystemVerilog (3 5 years)
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Experience with emulation/prototyping platforms such as HAPS Zebu Protium or Palladium (2 4 years)
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Experience with SoC verification and emulation for multimillion gate designs (3 4 years)
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Knowledge of SoC protocols such as AXI ACE APB PCIe DDR Ethernet and SerDes (2 3 years)
Debugging & Tools:
Scripting & Automation:
Professional Skills:
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Strong analytical and problem-solving abilities
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Effective communication and collaboration skills across engineering teams
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Ability to work in a fast-paced dynamic development environment
Education:
Why Join Us Trilyon Inc. offers a comprehensive benefits package.
Opportunities for growth and professional development.
Collaborative and inclusive company culture
Equal Employment Opportunity (EEO) Statement: Trilyon Inc. is an Equal Opportunity Employer committed to diversity equity and inclusion. We do not discriminate based on race color religion gender gender identity sexual orientation national origin age disability veteran status or any other protected status under applicable laws. Our diverse team drives innovation competitiveness and creativity enhancing our ability to effectively serve our clients and communities. This commitment to diversity makes us stronger and more adaptable.
Job Location:
Monthly Salary:
Not Disclosed
Posted on:
5 hours ago
Vacancies:
1 Vacancy
