Design Verification Engineer

Dallas, IA - USA

Monthly Salary: Not Disclosed

Posted on: 7 hours ago

Vacancies: 1 Vacancy

Job Summary

Role: Design Verification Engineer
Locations: Bay Area CA Austin TX Dallas TX

Contract

Role Overview

You will be responsible for architecting and executing advanced verification strategies for next-generation SoC designs including RISC-V cores cache-coherent subsystems and high-performance compute units.
The ideal candidate will have strong experience in datapath verification formal tools and system-level integrations.
We are looking for highly skilled engineers who can operate independently and contribute to building a high-performance DV team from the ground up.

Must-Have Skills (Core Requirements)

Strong RISC-V architecture knowledge with verification experience
Experience with VC Formal DPV App (Datapath Verification) RTL vs C/C model conformance
Experience verifying L3 cache coherent systems with AXI and CHI interfaces
Strong programming in C/C
Hands-on experience with Synopsys tools (VCS VC Formal)
Python-based simulation flow development

Preferred / Plus Skills

Wide Vector Unit & Matrix Multiply (MatMul) Unit verification
Formal verification methodologies
SoC system integration (including booting Linux OS)
GLS (Gate Level Simulation)
Low Power verification (CPF / UPF)

Key Skills: Design Verification Engineer RISC-V architecture VC Formal DPV App Python Synopsys tools

Role: Design Verification Engineer Locations: Bay Area CA Austin TX Dallas TX Contract Role Overview You will be responsible for architecting and executing advanced verification strategies for next-generation SoC designs including RISC-V cores cache-coherent subsystems and high-performance compu...