Graduate Engineer – Digital Backend (RTL to GDS), Cadence Flow (fmd)

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profile Job Location:

Munich - Germany

profile Monthly Salary: Not Disclosed
Posted on: 15 hours ago
Vacancies: 1 Vacancy

Job Summary

As a Graduate Digital Backend Engineer you will participate in the endtoend physical implementation of complex SoC and mix-signal designs. You will work within an experienced backend team and learn how to transform RTL code into a tapeoutquality GDSII database using the Cadence digital implementation tool suite. The role spans the complete backend flow including synthesis floorplanning power planning place & route timing closure physical verification and signoff.

You will receive structured coaching access to internal training material and the opportunity to work on real production designs while gradually taking ownership of specific blocks.

 

1. RTL Synthesis (Cadence Genus)

  • Run logic synthesis and generate optimized netlists according to timing area and power constraints.
  • Perform constraint development and validation (SDC).
  • Analyze synthesis reports: timing area power QoR and identify optimization opportunities.
  • Collaborate with RTL and verification teams to resolve structural issues.

2. Floorplanning & Power Planning (Cadence Innovus)

  • Assist in creating initial chip and block floorplans including die/core sizing aspect ratio macro placement and I/O planning.
  • Support power grid (PG) design power rail planning and IRdropaware placement.
  • Ensure integration of physical IP (memories analog blocks hard macros).

3. Placement Clock Tree Synthesis & Routing

  • Run placement CTS and detailed routing using Cadence Innovus.
  • Perform optimization iterations for timing congestion and power.
  • Implement designformanufacturability (DFM) and powerintent (UPF) guidelines.
  • Ensure correctness of CTS: skew slew balancing and power efficiency.

4. Static Timing Analysis (Cadence Tempus)

  • Analyze and resolve setup/hold violations across multiple modes and corners.
  • Work with multicorner multimode (MCMM) analysis environments.
  • Debug timing paths parasitics and crosstalk using Cadence signoff flows.

5. Power & IRDrop Analysis (Cadence Voltus)

  • Prepare power models and scenarios for dynamic and static IRdrop analysis.
  • Perform EM/IR validation and support PDN optimization.
  • Interpret results and propose improvements in PG design or standardcell usage.

6. Physical Verification (Mentor Calibre)

  • Run DRC LVS and ERC checks on full layouts.
  • Debug physical verification violations and collaborate with layout engineers.
  • Ensure the design meets manufacturing requirements and PDK guidelines.

7. Signoff ECO Handling & Final GDSII Output

  • Execute ECO cycles using Cadence Innovus/Genus ECO flows.
  • Validate timing power signal integrity and physical verification after ECOs.
  • Prepare the final tapeoutready GDSII database.
  • Support documentation and signoff reviews for tapeout

 


Qualifications :

  • Masters or Bachelors degree in Electrical Engineering Computer Engineering Microelectronics or a related field.
  • Solid understanding of CMOS fundamentals digital design and VLSI basics.
  • Familiarity with Verilog/VHDL SDC constraints and Unix/Linux workflows.
  • Basic exposure to scripting languages (TCL Python or Perl).
  • Strong analytical thinking and problemsolving skills.
  • Proactive collaborative and eager to learn.

NicetoHave Skills

  • Knowledge of RTL synthesis or P&R concepts through academic projects or internships.
  • Understanding of timing analysis STA concepts or physical verification.
  • Experience with any EDA tool (Cadence Synopsys Mentor).

What We Offer

  • Structured onboarding and mentorship by experienced Senior Engineers.
  • Handson work on real production ASICs/SoCs.
  • Access to industrystandard EDA tools (Cadence Genus/Innovus/PrimeTime).
  • Career growth path toward Physical Design Engineer or Implementation Lead.
  • Opportunity to contribute to tapeouts across multiple technology nodes.

Additional Information :

Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier. As the industrys leading expert in embedded processing with unmatched quality and system-level know-how we have evolved to provide scalable and comprehensive semiconductor solutions for automotive industrial infrastructure and IoT industries based on the broadest product portfolio including High Performance Computing Embedded Processing Analog & Connectivity and Power.
 
With a diverse team of over 21000 professionals in more than 30 countries we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable power-efficient solutions today that help people and communities thrive tomorrow To Make Our Lives Easier.     
 
At Renesas you can: 

  • Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.  
  • Make a real impact by developing innovative products and solutions to meet our global customers evolving needs and help make peoples lives easier safe and secure. 
  • Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system including the remote work option and Employee Resource Groups will help you excel from the first day.    

Are you ready to own your success and make your mark  

Join Renesas. Lets Shape the Future together.  

Renesas Electronics is an equal opportunity and affirmative action employer committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex race religion national origin gender gender identity gender expression age sexual orientation military status veteran status or any other basis protected by law. For more information please read our Diversity & Inclusion Statement.

We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation collaboration and continuous learning.


Remote Work :

No


Employment Type :

Full-time

As a Graduate Digital Backend Engineer you will participate in the endtoend physical implementation of complex SoC and mix-signal designs. You will work within an experienced backend team and learn how to transform RTL code into a tapeoutquality GDSII database using the Cadence digital implementatio...
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Key Skills

  • Laboratory Experience
  • Vendor Management
  • Design Controls
  • C/C++
  • FDA Regulations
  • Intellectual Property Law
  • ISO 13485
  • Research Experience
  • SolidWorks
  • Research & Development
  • Internet Of Things
  • Product Development

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