Requirements:
- Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field.
- 3 years of experience in physical design of digital mixed-signal or RF integrated circuits.
- Strong knowledge of VLSI design principles and semiconductor manufacturing processes.
- Hands-on experience with physical design tools such as Synopsys Cadence or Mentor Graphics.
- Experience in floorplanning place & route timing analysis timing closure and physical verification (DRC and LVS).
- Ability to optimize Power Performance and Area (PPA) and familiarity with low-power design techniques.
- Exposure to advanced process nodes (7nm 5nm etc.) is a plus.
- Ability to write and maintain automation scripts using TCL Python or Perl.
- Strong analytical and problem-solving skills.
Good communication skills and ability to work well with different teams. - Self-motivated detail-oriented and able to work independently.
- Able to manage multiple tasks in a fast-paced work environment.
Responsibilities:
- Implement and optimize the physical design flow for digital mixed-signal and RF integrated circuits.
- Perform floorplanning placement clock tree synthesis (CTS) routing and timing closure.
- Collaborate with RTL design verification and hardware teams to ensure design specifications are met.
- Conduct timing analysis identify violations and drive timing convergence using industry best practices.
- Execute and review Design Rule Checking (DRC) and Layout Versus Schematic (LVS) verification.
- Optimize Power Performance and Area (PPA) metrics across all stages of the design.
- Develop enhance and maintain scripts and automation flows to improve design efficiency.
- Generate and review physical design reports and documentation.
- Support design integration activities and assist in resolving physical implementation challenges.
- Stay updated with advancements in physical design methodologies EDA tools and semiconductor process technologies.
Job Locations:
- Islamabad Lahore & Karachi
Requirements: Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field.3 years of experience in physical design of digital mixed-signal or RF integrated circuits.Strong knowledge of VLSI design principles and semiconductor manufacturing processes.Hands-on experie...
Requirements:
- Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field.
- 3 years of experience in physical design of digital mixed-signal or RF integrated circuits.
- Strong knowledge of VLSI design principles and semiconductor manufacturing processes.
- Hands-on experience with physical design tools such as Synopsys Cadence or Mentor Graphics.
- Experience in floorplanning place & route timing analysis timing closure and physical verification (DRC and LVS).
- Ability to optimize Power Performance and Area (PPA) and familiarity with low-power design techniques.
- Exposure to advanced process nodes (7nm 5nm etc.) is a plus.
- Ability to write and maintain automation scripts using TCL Python or Perl.
- Strong analytical and problem-solving skills.
Good communication skills and ability to work well with different teams. - Self-motivated detail-oriented and able to work independently.
- Able to manage multiple tasks in a fast-paced work environment.
Responsibilities:
- Implement and optimize the physical design flow for digital mixed-signal and RF integrated circuits.
- Perform floorplanning placement clock tree synthesis (CTS) routing and timing closure.
- Collaborate with RTL design verification and hardware teams to ensure design specifications are met.
- Conduct timing analysis identify violations and drive timing convergence using industry best practices.
- Execute and review Design Rule Checking (DRC) and Layout Versus Schematic (LVS) verification.
- Optimize Power Performance and Area (PPA) metrics across all stages of the design.
- Develop enhance and maintain scripts and automation flows to improve design efficiency.
- Generate and review physical design reports and documentation.
- Support design integration activities and assist in resolving physical implementation challenges.
- Stay updated with advancements in physical design methodologies EDA tools and semiconductor process technologies.
Job Locations:
- Islamabad Lahore & Karachi
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