Senior Principal Engineer

We are seeking a Principal Engineer for a leading provider of innovative technologies including ultra-fast read channels high-performance processors leading edge transceivers highly efficient analog designs and powerful cryptographic engines. The main objective of this role is to help ensure the overall success of the product. The role may involve a combination of project planning and hands-on technical development depending on the individual. This is a highly visible position within the larger organization and you will be a key player in the bring-up and development of the product throughout its entire lifecycle.

If you want to work in a dynamic exciting environment where you can be a difference maker please apply!

Travel: You will be expected to travel to global offices for product development and chip bring-up (3 weeks/year including California Italy and Vietnam)

Core Responsibilities- Software Team

• Develop embedded firmware running on a RISC-Vbased multi-core MCU that controls a proprietary DSP data path
• Design and maintain a C-based SDK provided to customers for interfacing with and controlling the product
• Develop and support a Python-based GUI for in-field debugging status monitoring and control
• Build and maintain build systems test frameworks and automated regression infrastructure for all software components
• Act as the technical and/or project lead for a product guiding a dedicated software team of 28 engineers from requirements gathering through volume production
• Own the overall architecture design development and testing of embedded C firmware for complex DSP hardware

• Lead investigations into difficult-to-debug issues driving root cause analysis in collaboration with HW and systems teams

• Coordinate with test validation and customer support teams to ensure issues are fully resolved

• Collaborate cross-functionally to:

• Plan software milestones

• Execute development in sprints

• Track and close tickets

• Work across multiple test disciplines

• Deliver features and ensure high product quality

• Translate complex specifications from standards bodies (MSA OIF CMIS) or direct customer input into:
• Clear internal documentation

• Well-defined requirements

• Sequence diagrams to aid development

Tasks and Activities

• Mentor junior engineers while jointly tackling complex HW/SW debug challenges

• Define use cases system architecture and diagrams for new features and integrate them seamlessly into existing firmware and customer SDKs
• Convert computationally intensive floating-point MATLAB algorithms into fixed-point firmware state machines and develop validation methods to ensure functional equivalence
• Partner with cross-team leads to create post-silicon system test plans for new products
• Use production firmware in DV simulation environments to debug complex sequencing issues observed in the field
• Influence hardware design teams to implement changes in next-generation products that improve field usability and customer experience

Minimum Requirements:

• Bachelors/Masters degree in CSE/ECE or related technical field(s)
• 15 years of experience in memory constrained embedded C/C FW development
• Software Team Lead or Technical Lead on embedded projects; project management & release planning architecture design & development code reviews & testing through to customer volume production
• Understanding of embedded SoC micro-controller architecture (RISC-V architecture a plus) memory-mapped hardware interfaces GPIOs ISRs etc.
• Excellent verbal and written communication skills in English and able to collaborate in a large cross functional organization
• Excellent problem-solving and customer debug skills on real hardware in the lab
• Experience with using revision control and defect tracking systems (git & Jira or similar)

Preferred but not required:

• Experience with SERDES IM-DD/Coherent DSP Ethernet/PCIe PHYs and/or Optical Module Software.
• Experience with designing/developing/debugging software state machines transitions context saving error handling
• Experience with mixed-signal (Analog Digital) control and monitoring PID/feedback loop control etc.
• Experience with bare-metal RTOS device driver Linux kernel etc.
• Familiarity with advanced compiler options and details (clang/gcc preferred)
• Proficient in C and Python with knowledge of git Linux makefiles gdb IDEs bash etc.
• Familiarity with digital verification test flows FPGA emulation hardware languages such as Verilog
• Familiarity with lab equipment such as oscilloscopes supplies PNAs ONTs etc.
• Understanding of networking from the OSI model with emphasis on the PHY up to the data link level
• Understanding of signal processing: histograms BER SNR sampling phase Shannon limit impulse & frequency response FFT etc.