Technical Staff Engineer Architecture (System)

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Job Description:

Microchip Technology FPGA Business group is seeking a highly skilled and experienced System Architect to join our dynamic team. The successful candidate will be responsible for leading cross-functional teams to deliver high-performance IP integrations into our FPGA products that meet market & customer requirements across a broad range of application spaces.

This position is in the Silicon Architecture team of Microchips FPGA Division. Microchip is a major supplier of low-power and highly-reliable field-programmable gate arrays (FPGAs). Our FPGAs are used in a wide variety of applications including embedded vision; digital signal processing; machine learning; industrial and medical equipment; and satellites. Microchip is also a pioneer in embedding RISC-V processors in FPGAs.

The successful applicant will work as part a core team to develop future FPGA device products and will collaborate with other engineering disciplines to model develop verify and integrate various system components such as IO hard IP blocks hard & soft IP solutions system clocking that interoperate with overall configuration and security features to deliver performant FPGA products.

Key Responsibilities:

• Lead cross-functional teams to deliver high-performance IP integrations into Microchip FPGA products
• Work on ASIC & FPGA IP development integration and deployment for components such as PCIe CXL DDR NOC High Speed Serial Transceivers High Performance Parallel IO interfaces eNVM eSRAM configuration subsystem etc.
• Understand customer use models and the role of IP in overall system architecture
• Work cross-functionally with other architects designers and back-end implementation teams
• Lead and mentor other engineers in the team

Requirements/Qualifications:

• Bachelors Masters or higher in EE CS CE or other applicable disciplines
• 12 years of relevant experience
• Proven experience in ASIC & FPGA IP development integration and deployment including all stages of development from Synthesis constraint management place & route floor planning timing closure CDC/RDC
• Experience in technical leadership and people management
• Proven ability to work cross-functionally with other architects designers and back-end implementation teams
• Knowledge and experience with Synopsys & Cadence ASIC flows
• Proven experience defining system-level architecture and IP integration strategies for complex FPGA or SoC products
• Experience driving architectural trade-offs across performance power area cost and schedule
• Experience translating customer use models and product requirements into architectural and integration specifications
• Hands-on experience with high-speed and complex IPs such as PCIe CXL DDR NoC high-speed serial transceivers and high-performance IO

Preferred Qualifications

• Knowledge and experience with system-level performance modeling in TLM/SystemC/Other
• Scripting for EDA in Perl Python Tcl
• Working knowledge of HW/SW partitioning and firmware interactions in complex systems
• Experience identifying architectural and integration risks and driving mitigation strategies

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Benefits of working at Microchip

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex gender identity sexual orientation race color religion national origin disability protected Veteran status age or any other characteristic protected by law.

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