Design Engineer II Verification
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Job Location:
Monthly Salary:
Posted on:
23 hours ago
Vacancies:
1 Vacancy
Job Summary
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Design Engineer Verification
Location: Nanjing
Position Description:
Specific duties include:
- Responsible for verification plan define based on IP design SPEC.
- Lead verification team to achieve the coverage driven verification goals.
- Verification Test-Bench maintain and development.
- Deep understanding on ASIC verification flow responsible for milestone delivery check
Position Requirements:
- Master degree with 1 years or bachelor with 2 years as an experienced digital IC verification.
- Experienced in successful tape-out of ASIC chips
- Familiar to UVM test-bench architecture and experienced on test-bench development.
- Self-motivation with communication skills (spoken and written English and Mandarin)
- Experienced in coding of SV Perl/Python Makefile
Were doing work that matters. Help us solve what others cant.
Required Experience:
IC
Key Skills
- Arabic Speaking
- Logistics Operations
- Lecturing
- Community Support
- Gynaecology & Obstetrics
- AC Maintenance
About Company
Do you want to shape the future of technology? Cadence is leading the charge to solve some of technology’s toughest challenges. We work with the world’s most innovative companies, across a growing range of industries. Major trends that you hear about everyday – like artificial intell ... View more
