Power Integrity Engineer
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Job Location:
San Francisco, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
30+ days ago
Vacancies:
1 Vacancy
Job Summary
Definition of the PDN architecture and design solution space for systems across a wide range of power specifications. Power delivery modeling simulation and characterization for die interposer package board and Voltage Regulator. Close collaboration with multi-functional teams to design end-to-end power delivery systems for both current and future generations. Broad responsibility on all SoC droop related topics including on-die inrush off-die droop budget PDN signoffs noise coupling analysis voltage guard band active droop mitigation etc.
- BS and 10 years of relevant industry experience.
- M.S and or Ph.D. with academic background in Power/Signal Integrity Power Electronics or Analog Circuit Design.
- Understanding of power supply architecture covering multi-stage voltage regulator technologies PCB and package design trends and trade-offs and chip supply design including low-power and high-power design methodologies.
- Experience in PI/SI methodology development PDN modeling from system to die and lab correlation/validation.
- Proficiency in Python coding AI/ML assisted automation experience.
- Experience in design and analysis of product power supply solution.
- Deep understanding of Voltage Regulator design principles and electrical performance in the system environment.
- Good knowledge in 3D/2D EM simulation tools electromagnetic and transmission line theory.
- Familiar with lab equipment including but not limited to VNA real-time scope spectrum analyzer.
- Ability to work and communicate efficiently in a multi-functional teams.
Key Skills
- IDS
- System Design
- Haskell
- PCB
- Root cause Analysis
- Technical Writing
- System Security
- Federal Aviation Regulations
- Warehouse Distribution Experience
- Encryption
- Product Development
- Contracts
About Company
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