Employer Active
Job Alert
You will be updated with latest job alerts via emailJob Alert
You will be updated with latest job alerts via emailRole
Senior Design Engineer
(Expertise in DSP/DIP/Bus Protocols is MUST and Leadership experience is a Plus.)
Eligibility
2.5 - 3 years of experience in VLSI/Digital Communications and M.E/ in VLSI Design/Digital Communications/DigitalSystems.
Required Technical Skills
Strong DesigningDebugging and Analyzing experience. Excellent knowledge of HDLs(VHDL/Verilog) with Hardware OrientationVLSI Design Digital Design Basics of Electronics Synthesis and FPGA Prototyping Knowledge.
Required Soft Skills
Team Player Dedicating Hard working be able to work independently and self-motivative.
Optional but Desired Skills
Leading Experience Knowledge on Verification is on Xilinx ISE Teaching Experience is an added advantage. Preferably located inHyderabad.
Responsibilities
Leading the designing team in front and closely working with tech directors to meet the designing and developement goals. Responsible for designing the projects and deliver the projects in time. Should be well versed with designing and debugging
Required Experience:
Senior IC
Full Time