Lead Application Engineer
Lead Application Engineer
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Job Description
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Principal Application Engineer (Front-end Verification)
Position Description:
1. Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution simulation Emulation and Acceleration products.
2. Plan execute and manage key technical evaluations and benchmark with existing and potential customers.
3. Train ramp-up and accompany customer project.
4. Conduct basic and advanced trainings presentations and demos as necessary.
5. Providing technical expertise to address clients queries which need expert involvement.
6. Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.
Position Requirements:
Over 28 years experience in the following areas:
1. experience in Verilog/VHDL for IP or SoC chip level.
2. HW verification with knowledge of System Verilog/VHDL and HDL simulators
3. FPGA prototyping project experience
4. Experience with hardware emulator or accelerator is a big advantage
5. Advanced Verification Methodology like UVM is a plus
6. Knowledge of Unix and Linux is highly desired
7. Strong verbal and written communication skills in English
8. Strong teamwork skills with good human relationship
Were doing work that matters. Help us solve what others cant.
Employment Type
Full-Time
