Asm dv engineer
Asm dv engineer
Posted on :
21-08-2025
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1 Vacancy
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Job Description
Required Skills:
Over 5 years of experience in modeling at various levels of abstraction using System Verilog RNM and custom UDNs.
Proficient in verification of complex mixed-signal products at block, subsystem, and ch
"analog mixed signal,design verification,UVM verification,mixed-signal,Verilog RNM,custom UDNs"
Employment Type
Full Time
Company Industry
Key Skills
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