Imagine yourself at the center of our hardware development effort! We collaborate with all teams playing a strategic role of getting functional products to millions of customers quickly. As a key member of the team responsible for the delivery of high-quality on-time silicon that spans all aspects of power management architectural design and topologies you will:-Work with Systems and Platform teams to establish silicon requirements.-Lead efforts that develop integrate characterize and test devices that include power regulators chargers backlight drivers boost converters.-Deliver first revision functional silicon and production worthy silicon per system requirements on schedule.-Work with external vendors to ensure innovative design practices methodologies and processes are in place to produce quality results.-Work together with vendors to manage the development of new process technologies and next generation architectures and circuit designs.-Ensure designs are accurately verified validated and tested for long-term reliability.-Support multi-functional engineering teams for system validation and mass production approval.-This role involves approximately 20% travel.
BS 10 years of industry experience.
Experience with power topologies such as buck boost buck-boost charge pumps LDOs.
Understanding of control architectures such as current mode voltage mode and hysteretic mode for applications include DC/DC converters LED drivers battery management circuits LDOs temperature sensors.
Understanding of semiconductor device physics device safe-operating area (SOA) and power transistors used for high frequency switching. Solid understanding of DC/DC power converter modeling techniques using any of the following simulation tools such as MATLAB Simplis PSIM or Spectre.
Understanding of Analog IC circuit design as it relates to power conversion architecture requirements design tools and methodologies. Circuit blocks include bandgap references op amps OTAs bias circuits comparators oscillators DACs ADCs level- shifters switching power stages LDOs charge pumps glue logic. Key parameters include voltage and current accuracy load and line transient response DC gain bandwidth phase and gain margin slew rate efficiency offset PSRR CMRR noise propagation delay input and output common mode range supply headroom.
Experience working in a team environment on mixed signal ICs that integrate power management circuits ADCs DACs and digital state machines is strongly preferred with proven industry- leading design expertise required.
Experience taking projects from the concept phase through chip architecture writing electrical specifications process technology selection die size estimation managing schedules IC design layout supervision layout extraction and verification DRCs LVS LVL mask and wafer fabrication monitoring ATE lab correlation corner lot characterization analysis hands-on lab evaluation release to production yield improvement and failure analysis support.
Design management experience with multi-functional preferred.
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