As a Wireless System Verification Engineer at Apple you will be responsible for reviewing IEEE wireless standards and chip design specifications. You will collaborate with design and systems engineering teams to develop comprehensive verification plans. You will architect and develop testbenches and environments using SystemVerilog UVM and Python creating simulating and debugging complex test scenarios. You will also learn and stay updated to the latest IEEE Wireless standards. You will work closely with Design Architecture Power Silicon Validation Performance and Software teams to achieve common goals.
Minimum requirement of a bachelors degree.
Experience using and building UVM testbenches and SoC bring-up.
Knowledge of Wireless Connectivity or MAC/PHY verification.
Experience with embedding Python into other applications or extending Python by integrating C libraries.
Proficiency in scripting languages like TCL Python.
Excellent analytical and debug skills.
Proficiency in developing SystemVerilog-based tests and checkers.
Experience developing and debugging Python scripts.
Experience in version control like git can be a plus.
Proficiency in developing SystemVerilog-based tests and checkers.
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