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1 Vacancy
Role: (RTL) Design Engineer
Location: Santa Clara CA (Hybrid negotiable)
Interview: Phone/Skype
Were looking for a seasoned RTL engineer with 7 years of experience in #RTLDesign #Verilog #VLSI #CDC #STA #Synthesis #DFT #Python #TCL #AMBA #PCIe #LowPowerDesign to contribute across design coding debugging and optimization of digital blocks.
#SemiconductorJobs #HardwareDesign #LogicEngineering #RTL #SantaClaraHiring
Additional Information :
All your information will be kept confidential according to EEO guidelines.
Remote Work :
No
Employment Type :
Contract
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