Job Title- Memory Layout Engineer
Location Ottawa ON Canada
Contract 1 year
Memory Layout Engineer:
( Experience on Memory layout-MRAM/RRAM/SRAM/CAM/TCAM Memory compiler/Tiler complex memory layout define and architect floor planning of memory low power and high speed and high density sense amplifier layout decoder layout memory peripheral layout CADENSE -virtuso tool collaborate memory circuit designer and memory verification engineer
Responsibilities
- Lead the design and development of memory layouts for complex ICs including:
- High-density SRAM memories
- Specialty memory blocks (e.g. memory CAM)
- Define memory architecture and sub-block specifications
- Develop and implement advanced layout techniques for low-power high-speed memory design
- Collaborate with design and verification teams to ensure seamless integration
- Mentor junior engineers and provide technical guidance
- Stay up-to-date on the latest memory design trends and technologies
- Perform comprehensive physical verification- follow the design rules given by foundry( example) metal density space etc) using DRC DSM LVS and other tools
- Drive Design for Manufacturability (DFM) and Design for Yield (DFY) initiatives
- Analyze layouts for potential power integrity and signal integrity issues
- May involve scripting automation for layout tasks using languages like PERL Shell TCL or Skill
- Non Volatile / Volatile -Memory
Remote Work :
No
Employment Type :
Contract