drjobs CAD & Design Methodology Engineer - Front end verification, RTL2GDS, Verilog model, Logic Equivalence Check (LEC), Synthesis

CAD & Design Methodology Engineer - Front end verification, RTL2GDS, Verilog model, Logic Equivalence Check (LEC), Synthesis

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Job Location drjobs

Bengaluru - India

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

Title: CAD & Design Methodology Engineer Front end verification RTL2GDS Verilog model Logic Equivalence Check (LEC) Synthesis

About GlobalFoundries

GlobalFoundries is a leading fullservice semiconductor foundry providing a unique combination of design development and fabrication services to some of the worlds most inspired technology companies. With a global manufacturing footprint spanning three continents GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information visit .

Introduction

This position is for a CAD/ Design Methodology Engineer developing and supporting the methodology for designing and verifying front end views of IP design blocks. The successful candidate needs to be selfdriven with a strong solutionoriented approach.

Your Job

  • Work closely with the IP design teams and EDA vendors to develop methodologies and flows for front end design view generation and verification. Frontend design views include Verilog views enabling efficient RTL and RTL2GDS design flows test views power intent.

  • Provide templates for views and view generation flows that can be smoothly integrated in IP design automation flows

  • Develop and deploy verification methodologies flows testbench and test case generation automation.

  • Interact closely with EDA vendors of tools and flows in RTL simulation and analysis Logic equivalence checking power intent checking test generation and test analysis RTL synthesis.

  • Use scripting languages in a UNIX environment as well as advanced revision control and regression automation.

  • Work with crossgeo crossfunctional teams to understand requirements and communicate resolution in a timely manner.

  • Mentor and train junior engineers towards building effective software and automation features.

Required Qualifications:

  • Expertise in methodology frontend modelling of IP design blocks with focus on foundational IP: logic IO and memory

  • Verilog for RTL simulation

  • Gate simulation and timing annotation

  • Assertions

  • Verification test vector generation coverage and regression automation

  • Production test views test vector generation test insertion test coverage analysis

  • Modelling and verification of power intent

  • Sound knowledge of industry standard EDA tools and flows to support foundational IP standard cell and memory designs with focus on

  • RTL simulation tools and flows

  • RTL synthesis and implementation flows

  • Logic equivalence checking

  • Static and dynamic assertion verification

  • Static and dynamic power intent verification

Preferred Qualifications:

  • Requires a Bachelor of Engineering (B.E.) or equivalent degree in a related field from an accredited university.

  • B.E./ minimum of 810 years of relevant industry experience

  • 710 years of experience in relevant design or design enablement of IPs.

  • Language Fluency Fluent in English Language written & verbal.

  • Must have proficient knowledge of and experience with Unix environment.

  • Must have good technical verbal and written communication skills and ability to work with cross functional teams is necessary.

  • Be able to collaborate with program and technical design leads on multiple concurrent projects.

  • Should have excellent problemsolving skills written & oral communication teaming & interpersonal skills.

  • Perform all activities in a safe and responsible manner and support all Environmental Health Safety & Security requirements and programs.

  • Familiarity with standard engineering practices like Version Control systems Configuration Management and Regression process.

GlobalFoundries is an equal opportunity employer cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity efficiency and innovation whilst our employees feel truly respected valued and heard.

As an affirmative employer all qualified applicants are considered for employment regardless of age ethnicity marital status citizenship race religion political affiliation gender sexual orientation and medical and/or physical abilities.

All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks medical screenings as applicable and subject to the respective local laws and regulations.

Information about our benefits you can find here:

Employment Type

Full-Time

About Company

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