DFT Engineer
DFT Engineer
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Job Description
The engineer should be well versed in Verilog/VHDL RTL coding experienced in using Mentor DfT tools and Cadence tools.
The engineer needs to have handson experience in scan insertion JTAG ATPG DRC and coverage analysis Simulation debug with timing/SDF.
Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable
Must be proactive collaborative and detailoriented capable of exercising independent judgment
The engineer with experience on debug and root cause the problem in simulation failures
Selfmotivation flexibility with strong interpersonal skills. Effective communication skills oral and written skills.
Remote Work :
No
Employment Type
Full Time
