IOESD custom layout engineer
IOESD custom layout engineer
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Job Description
Job Responsibilities:
Undertake the roles of a custom layout engineer in realizing the physical implementation of a variety of circuitries including IO/ESD Foundation IP Analog IP and RFIC across multiple process nodes and diversified foundries.
Be responsible for tasks assigned and assume full responsibility of the complete layout implementation process including floorplanning layout construction physical verification and QA flow signoff.
Provide timely project status updates and proactively anticipate potential execution pitfalls to ensure highquality and ontime delivery for each project.
Be proactive in communicating effectively with multifunctional teams and multisite to constantly optimize layout for better Power Performance & Area.
Requirements
Requirements:
Bachelor s degree in Electrical/Electronic Engineering.
Minimum of 3 years of direct experience in custom Foundation IP (IO/ESD) and/or RF/Analog layout implementation. Handson experience in advanced CMOS technologies (FinFETs/GAA) in a critical factor.
Proficient in technical knowledges related to: Foundry DRM of advanced CMOS technologies design for manufacturability (DFM) floorplanning techniques for hierarchical layout designs SI/PI EM/IR and ESD backend implementation flows.
Strong knowledge in floorplanning techniques at different hierarchies with emphasis on power mesh planning critical block placement critical signal routing matching and topdown integration flow.
Proficient in Cadence/Synopsys layout editor and physical verification tools; analytical and skillful in debugging physical verification such as DRC/LVS/ERC/ANT/PERC and all other verifications.
Effective crossteam communication and time management skills.
Proficient in IO/ESD layout and familiar with the layout requirement is a plus.
Employment Type
Full Time
