FPGA Development Engineer Annapurna Labs

Annapurna Labs builds highperformance hardware and software solutions used in AWS data centers globally. Were looking for a FPGA development engineer with a focus on building accelerator services. As a FPGA Development Engineer you will be responsible for delivering design development and deployment of FPGA based accelerators . A successful candidate will have an established background in developing customerfacing experiences a strong technical ability excellent project skills great communication skills and a motivation to achieve results in a fastpaced environment.

As a member of the Accelerator Systems FPGA team youll develop FPGA accelerator services that enable customers to run hardware acceleration on AWS. Youll gain knowledge of our data center infrastructure including technologies like AWS F1/F2 and how they enable hardware acceleration in the cloud.

You will own large scale deployments in a continuous effort to deliver a worldclass customer experience. This is a fastpaced intellectually challenging position and youll work with multiple technology areas. Youll have high standards for yourself and everyone you work with and youll be constantly looking for ways to improve our products performance quality and cost. Were changing an industry and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities
Develop RTL designs for FPGA based acceleration; including designs running on the accelerator service designs for customer examples and internal accelerators.
Dive deep on issues at the intersection of hardware and software. Debug and troubleshoot hardware issues and performance bottlenecks.
Member of a team responsible for system remediation operational excellence and customer experience on bleeding edge FPGA accelerator products
Implement and improve simulation (design verification) testing across the product lifecycle
Strong skills presenting technical information verbally and in written reports.
Responsible for the FPGA development life cycle which includes defining product features and performance benchmarks needed to meet customer requirements
Report on status of development quality operations and system performance to management
Deliver accelerator designs as part of the SDK to external customers and FPGA developers
Review and provide feedback on hardware architecture/design/validation/verification plans


2 years of noninternship system design and/or architecture (design patterns reliability and scaling) experiences for new or existing products using FPGA.
3 years of experiences of RTL development using SystemVerilog Verilog or VHDL
3 years of experiences in testbench development and debugging using SystemVerilog/UVM
Experience of FPGA development tools (AMD Vivado Altera/Intel Quartus etc.
Programming experience in scripting languages (Shell Python Tcl or Lua)
Experience with Linux environments and Git
Bachelors degree in computer engineering or equivalent

Demonstrated experience in hardware acceleration development using FPGAs or GPUs with handson expertise in C/C/OpenCL and hardware optimization techniques
Handson experience with Xilinx Vitis development environment and HighLevel Synthesis (HLS)
Experience implementing continuous integration and continuous deployment (CI/CD) practices for FPGA development workflows

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