Analog IC Design Engineer Staff
Analog IC Design Engineer Staff
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Salary Not Disclosed
1 Vacancy
Job Description
About Marvell
Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI automotive and carrier architectures our innovative technology is enabling new possibilities.
At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.
Your Team Your Impact
CE AMS ACE PHY group supports analog mixed signal product development for Automotive and Ethernet PHY businesses in Marvell.What You Can Expect
You will be working with multifunctional teams to deliver highspeed Ethernet products. You will define specifications based on link budget behavioral modeling and transistorlevel feasibility. You will also drive schematic design and collaborate on mask design for implementation. And finally with the team you will drive designs into volume production and delight customers.
What Were Looking For
Masters degree and/or PhD in Electrical Engineering and 13 years of experience.
* The ideal candidate will have a deep understanding of analog mixedsignal design with experience in highspeed transceivers.
* Solid understanding and experience of designing analog mixedsignal circuit blocks including PLL phase interpolator low jitter clock distribution bandgap biasing circuits LDO regulators amplifiers comparators highspeed DACs and ADCs filters
* Indepth knowledge of analog mixedsignal concepts like mismatch mitigation linearity stability lowpower and lownoise techniques
* Handson experience with AMS IC development from definition to highvolume production including layout supervision bench evaluation correlation and characterization
EXPERIENCE IN THE FOLLOWING AREAS IS DESIRABLE:
* Experience with Tx/Rx equalization techniques and circuits like deemphasis CTLE DFE
* Experience with highspeed digital circuits (e.g. serializer deserializer counters dividers etc.
* Familiarity with CDR architectures and implementations
* Design experience in advanced CMOS technologies design with FinFet technology
* Experience in lab testing of highspeed transceivers
* Modeling of passive onchip elements such as inductor Tcoil and transformer
* Able to build VerilogA/AMS behavioral models
* Able to analyze and lead characterization data from lab and volume testing
* Knowledge of ESD requirements
Expected Base Pay Range (USD)
$ per annumThe successful candidates starting base pay will be determined based on jobrelated skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell we offer a total compensation package with a base bonus and and financial wellbeing are part of the package. That means flexible time off 401k plus a yearend shutdown floating holidays paid time off to volunteer. Have a question about our benefits packages health or financial Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .
#LIVM1Employment Type
Full-Time
